DLA SMD-5962-95722 REV B-2007 MICROCIRCUIT DIGITAL CMOS RADIATION HARDENED 16-BIT MICROPROCESSOR MONOLITHIC SILICON《抗辐射互补金属氧化物半导体16-BIT微处理器硅单片电路线型微电路》.pdf

《DLA SMD-5962-95722 REV B-2007 MICROCIRCUIT DIGITAL CMOS RADIATION HARDENED 16-BIT MICROPROCESSOR MONOLITHIC SILICON《抗辐射互补金属氧化物半导体16-BIT微处理器硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95722 REV B-2007 MICROCIRCUIT DIGITAL CMOS RADIATION HARDENED 16-BIT MICROPROCESSOR MONOLITHIC SILICON《抗辐射互补金属氧化物半导体16-BIT微处理器硅单片电路线型微电路》.pdf（29页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R096-96. 96-04-05 Monica L. Poelking B Correct title to accurately describe device function. Update boilerplate to current MIL-PRF-38535 requirements and to include radiation hardness assurance requirements. LT

2、G 07-05-25 Thomas M. Hess REV SHET REV B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAW

3、ING CHECKED BY Thomas M. Hess COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-01-28 MICROCIRCUIT, DIGITAL, CMOS, RADIATION HARDENED 16-BIT MICROPROC

4、ESSOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-95722 SHEET 1 OF 28 DSCC FORM 2233 APR 97 5962-E412-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENT

5、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finish

6、es are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 95722 01 V X C Federal stock class designator RHA designator (see 1

7、.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device c

8、lass M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function

9、01 80C86RH Radiation hardened16-bit microprocessor 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 complian

10、t, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T

11、40 or CDIP2-T40 40 Dual-in-line X See figure 1 42 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

12、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VDD) +7.0 V dc Input or output voltage range . VSS-0.3 V dc to VDD+0.3 V dc Storage temperature r

13、ange (TSTG) -65C to +150C Junction temperature (TJ). +175C Thermal resistance, junction-to-case (JC) Case Q . 8.6C/W Case X 9.7C/W Thermal resistance, junction-to-ambient (JA) Case Q . 40C/W Case X 72.1C/W Maximum package power dissipation at TA= +125C (PD) 2/ Case Q . 1.25 W Case X 0.69 W Maximum l

14、ead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating conditions. Operating supply voltage range (VDD) 4.75 V dc to +5.25 V dc Operating temperature range (TA) -35C to +125C Input low voltage range (VIL) 0 V dc to +0.8 V dc Input high voltage range (VIH). 3.5 V dc to VDDClock input

15、 low voltage range (VILC). 0 V dc to +0.8 V dc CLK and MS/MX input high voltage range (VILH) VDD 0.8 V dc to VDD1.5 Radiation features. Maximum total dose available (Dose rate = 50 300 rads(Si)/sec) . 100K Rads(Si) Transient upset 108Rads(Si)/sec 3/ Single event upset (SEU). 6 MeV/(mg/cm2) 3/ Single

16、 event latchup (SEL). 75 MeV/(mg/cm2) 3/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are tho

17、se cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case O

18、utlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document O

19、rder Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ If device power exceeds package dissipation ca

20、pability, provide heat sinking or derate linearly (the derating is based on JA) at a rate of 25.0 mW/C for case Q and 13.9 mW/C for case X. 3/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IH

21、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form

22、a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced

23、 by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this

24、drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes

25、Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shal

26、l be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38

27、535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure

28、3. 3.2.4 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as specified on figure 4. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Un

29、less otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups s

30、pecified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space

31、limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL

32、-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reprodu

33、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance sh

34、all be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herei

35、n). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-3853

36、5, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for

37、 device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring

38、 activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be

39、 in microcircuit group number 105 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC

40、FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ -35C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxHigh level output voltage (TTL) VOH1VDD= 4.75 V, IOH= -2.5 mA VIN= 0 V or VDD1, 2, 3 All 3.0 V High level output volt

41、age (CMOS) VOH2VDD= 4.75 V, IOH= -100 A VIN= 0 V or VDD1, 2, 3 All VDD-0.4 V Low level output voltage VOLVDD= 4.75 V, IOL= +2.5 mA VIN= 0 V or VDD1, 2, 3 All 0.4 V Input leakage current, low IIL-1.0 +1.0 Input leakage current, high IIHVDD= 5.25 V, VIN= GND or VDDDIP pins: 17-19, 21-23, 33 2/ 1, 2, 3

42、 All -1.0 +1.0 A Output leakage current, low IOZL-10 +10 Output leakage current, high IOZHVDD= 5.25 V, VOUT= 0 V or VDDDIP pins: 2-16, 26-29, 32, 34-39 2/ 1, 2, 3 All -10 +10 A Input current bus hold, high IBHHVDD= 4.75 V and 5.25 V VIN= 3.0 V Pins: 2-16, 26-32, 34-39 2/ 3/ 1, 2, 3 All -600 -40 A In

43、put current bus hold, low IBHLVDD= 4.75 V and 5.25 V VIN= 0.8 V Pins: 2-16, 34-39 2/ 4/ 1, 2, 3 All 40 600 A Standby power supply current IDDSBIO= 0 mA, VIN= VDDor VSSVDD= 5.25 V 5/ 1, 2, 3 All 500 A Operating power supply current IDDOPIO= 0 mA, VIN= VDDor VSSVDD= 5.25 V, f = 1 MHz 1, 2, 3 All 12 mA

44、/ MHz Functional tests See 4.4.1b, VIN= VDDor VSSVDD= 4.75 V and 5.25 V, f = 1 MHz 7, 8 All Noise immunity functional tests See 4.4.1b VDD= 4.75 V and 5.25 V VIN= 0.8 V or 3.5 V 6/ 7, 8 All Input capacitance CIN4 All 15 pFOutput capacitance COUTpFI/O capacitance CI/OSee 4.4.1c, f = 1 MHz, VDD= open

45、All measurements are referenced device GND. 4 All 20 pF CLK cycle period tCLCLVDD= 4.75 V and 5.25 V 7/ 9, 10, 11 All 200 ns CLK low time tCLCHVDD= 4.75 V 7/ 9, 10, 11 All 118 ns CLK high time tCHCLVDD= 4.75 V and 5.25 V 7/ 9, 10, 11 All 69 ns Data in setup time tDVCLVDD= 4.75 V 7/ 9, 10, 11 All 30

46、ns Data in hold time tCLDX1 VDD= 4.75 V 7/ 9, 10, 11 All 10 ns Ready setup time into device tRYHCHVDD= 4.75 V 7/ 9, 10, 11 All 113 ns Ready hold time into device tCHRYXVDD= 4.75 V 7/ 9, 10, 11 All 30 ns Ready inactive to CLK tRYLCLVDD= 4.75 V 7/ 8/ 9, 10, 11 All -8 ns Hold setup time tHVCHVDD= 4.75

47、V 7/ 9, 10, 11 All 35 ns INTR, NMI, TEST setup time tINVCHVDD= 4.75 V 7/ 9, 10, 11 All 30 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95722 DEFENSE SUPPLY CENTER COLUMBUS

48、 COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -35C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxMINIMUM MODE TIMING RESPONSE Address valid delay tCLAV9, 10, 11 All 10 110 ns ALE width tLHLL9, 10, 11 All tCLCH-20 ns ALE active delay tCLLH9, 10, 11 All 80 ns ALE inactive delay tCHLL9, 10, 11 All 85 ns Address hold time to ALE inactive tLLAX9, 10, 11 All tCLCH-10 ns Control activ