DLA SMD-5962-94601 REV C-2008 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《配.pdf

《DLA SMD-5962-94601 REV C-2008 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《配.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94601 REV C-2008 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《配.pdf（25页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device 02. Editorial changes throughout. tmh 95-11-20 Monica L. Poelking B Changes in accordance with the notice of revision 5962-R149-96. - jak 96-06-14 Monica L. Poelking C Redrawn with changes. Update the boilerplate to the current require

2、ments of MIL-PRF-38535. - jak. 08-09-15 Thomas M. Hess REV SHET REV C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh

3、V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-04-19 MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, SCAN TE

4、ST DEVICE WITH 18-BIT BUS TRANSCEIVER, THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-94601 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E449-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

5、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94601 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and s

6、pace application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example

7、: 5962 - 94601 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 speci

8、fied RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify t

9、he circuit function as follows: Device type Generic number Circuit function 01 54ABT18245 Scan test device with 18-bit universal bus transceiver, three-state outputs, TTL compatible inputs 02 54ABT18245A Scan test device with 18-bit universal bus transceiver, three-state outputs, TTL compatible inpu

10、ts 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accord

11、ance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 68 Quad flat pack 1.2.5 Lead finish. T

12、he lead finish is as specified in MIL-PRF-38535 for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94601 DEFENSE SUPPLY CENTER COLUMBU

13、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (VIN) -0.5 V dc to +5.5 V dc 4/ DC input voltage range (except I/O ports) (VIN). -0.5 V dc to +7.0

14、V dc 4/ DC output voltage range (VOUT) -0.5 V dc to +5.5 V dc 4/ DC output current (IOL) (per output). +96 mA DC input clamp current (IIK) (VIN= 0.0 V). -18 mA DC output clamp current (IOK) (VOUT 0.0 V). -50 mA VCCcurrent (IVCC) Device type 01 +581 mA Device type 02 +576 mA GND current (IGND) Device

15、 type 01 +1190 mA Device type 02 +1152 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C Maximum power dissipation (PD) . 950 mW 5/ 1.4 Recommended operating co

16、nditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . +0.0 V dc to VCCOutput voltage range (VOUT) +0.0 V dc to VCCMaximum low level input voltage (VIL ) 0.8 V Minimum high level input voltage (VIH ) . 2.0 V Maximum high level output current (IOH) -24 mA Maxi

17、mum low level output current (IOL) . +48 mA Minimum input edge rate (V/t) . 10 ns/V Minimum set up time (ts): mAn, mBn, mDIR, or mOE before TCK . 9.5 ns TDI before TCK . 4.5 ns TMS before TCK 3.6 ns Minimum hold time (th): mAn, mBn, mDIR, or mOE after TCK 0.7 ns TDI after TCK 0.0 ns TMS after TCK .

18、0.5 ns Minumum pulse width, TCK high or low (tw) 8.1 ns Minimum delay time, power-up (td) 50.0 ns 6/ Minimum rise time, VCCpower-up (tr) 1.0 s 6/ Maximum TCK frequency (fCLK) 50 MHz Case operating temperature range (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent

19、damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -

20、55C to +125C. 4/ The input negative voltage rating may be exceeded provided that the input clamp current rating is observed. 5/ The maximum package power dissipation is calculated using the junction temperature of 150C and a boad trace of 75 mils. 6/ These parameters are not production tested. Provi

21、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94601 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, s

22、tandards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - In

23、tegrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings.

24、MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following docu

25、ment(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. INSTITUTE OF ELECTRICAL AND ELECTRONIC ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary S

26、can Architecture. (Applications for copies should be addressed to the institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this d

27、rawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as sp

28、ecified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-J

29、AN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case o

30、utlines. The case outlines shall be in accordance with 1.2.4 and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on fig

31、ure 4. 3.2.5 Test access port controller and scan test registers. The test access port controller and scan test registers shall be as specified on figure 5. 3.2.6 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 6. 3.2.7 Switching

32、 waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94601 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432

33、18-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over

34、the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addit

35、ion, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Mark

36、ing for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The

37、 compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1

38、 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawi

39、ng shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes

40、Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices a

41、cquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore docum

42、entation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance. The device shall be co

43、mpliant with IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94601 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical perf

44、ormance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCDevice type Group A subgroups Limits 3/ Unit Min Max4.5 V All 1, 2, 3 2.5 V IOH= -3 mA 5.0 V All 1, 2, 3 3.0 V High level output voltage 3006 VOHFor al

45、l inputs affecting output under test, VIN= 2.0 V or 0.8 V IOH= -24 mA 4.5 V All 1, 2, 3 2.0 V Low level output voltage 3007 VOLFor all inputs affecting output under test, VIN= 2.0 V or 0.8 V IOL= 48 mA 4.5 V All 1, 2, 3 0.55 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -18 mA 4

46、.5 V All 1, 2, 3 -1.2 V mDIR, mOE, TCK All 1, 2, 3 1.0 A or B ports All 1, 2, 3 100 Input current high 3010 IIH4/ For input under test, VIN= VCCTDI, TMS 5.5 V All 1, 2, 3 10.0 A mDIR, mOE, TCK All 1, 2, 3 -1.0 A or B ports All 1, 2, 3 -100 Input current low 3009 IIL4/ For input under test, VIN= GND

47、TDI, TMS 5.5 V All 1, 2, 3 -150 A Three-state output leakage current high 3021 IOZH5/ For control inputs affecting output under test, VIN= 2.0 V or 0.8 V VOUT= 2.7 V 5.5 V All 1, 2, 3 50.0 A Three-state output leakage current low 3020 IOZL5/ For control inputs affecting output under test, VIN= 2.0 V

48、 or 0.8 V VOUT= 0.5 V 5.5 V All 1, 2, 3 -50.0 A 0.0 V 01 1 100 A Off-state leakage current IOFFFor input or output under test, VINor VOUT= 5.5 V All other pins at 0.0 V 0.0 V 02 1 450 A High-state leakage current ICEXFor output under test, VOUT= 5.5 V Outputs at high logic state 5.5 V All 1, 2, 3 50 A Output current 3011 IO6/ VOUT= 2.5 V 5.5 V All 1, 2, 3 -50 -200 mA Quiescent supply current delta, TTL input level ICC7/ For input under test, VIN= 3.4 V For all other inputs, VIN= VCCor GND 5.5 V All 1, 2, 3 50 A See footnotes at end of table.Provided by IHSNot for ResaleNo rep