DLA DSCC-VID-V62 12613 REV A-2012 MICROCIRCUIT LINEAR DIFFERENTIAL LINE RECEIVER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Remove device type 02. Add tube option to device type 01 under paragraph 6.3. - ro 12-09-20 C. SAFFLE Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 PM

2、IC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, DIFFERENTIAL LINE RECEIVER, MONOLITHIC SILICON 12-05-22 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/1261

3、3 REV A PAGE 1 OF 11 AMSC N/A 5962-V100-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirem

4、ents of a high performance differential line receiver microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number f

5、or identifying the item on the engineering documentation: V62/12613 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 INA2134-EP Differential line receiver 1.2.2 Case outline(s). The case out

6、line(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 MS-012-AB Plastic small surface mount 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip

7、 B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 3 1.3 Absolute maximum ratings. 1/

8、 Supply voltage range (+VSto -VS) . 40 V Input voltage range 80 V Output short circuit (to ground) . Continuous 2/ Junction temperature range (TJ) 150C Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . 300C 1.4 Recommended operating conditions. 3/ Supply volta

9、ge range (VS) 18 V Operating free-air temperature range (TA) . -55C to +125C 1.5 Thermal characteristics. Thermal metric Symbol Case X Unit Thermal resistance, junction-to-ambient 4/ JA73.1 C/W Thermal resistance, junction-to-case JC31.1 C/W Thermal resistance, junction-to-board 5/ JB27.6 C/W Charac

10、terization parameter, junction-to-top 6/ JT3.2 C/W Characterization parameter, junction-to-board 7/ JB27.3 C/W 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or a

11、ny other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ One channel per package. 3/ Use of this product beyond the manufacturers design rules or stated par

12、ameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 4/ The thermal resistance, junction-to-ambient under natural convection is obtained in a simulation on a JEDEC standard, high-K board, as specifie

13、d in JESD51-7, in an environment described in JESD51-2a. 5/ The thermal resistance, junction-to-board is obtained by simulating in an environment with a ring cold plate fixture to control the printed circuit board (PCB) temperature, as described in JESD51-8. 6/ Characterization parameter, junction-t

14、o-top (JT) estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). 7/ Characterization parameter, junction-to-board (JB) estimates the junction temperature of a device in

15、a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DW

16、G NO. V62/12613 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices EIA/JESD 51-2a - Integrated Circuits Thermal Test Method Environment Conditions Natural Convection (Still Air) EIA/JESD 51-7 - High

17、Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages EIA/JESD 51-8 - Integrated Circuits Thermal Test Method Environment Conditions Junction-to-Board (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107

18、 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container.

19、The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design

20、, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided

21、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit

22、 Min Max Audio performance section. Total harmonic distortion + noise VIN= 10 Vrms, f = 1 kHz +25C 01 0.0005 typical % Noise floor 3/ BW = 20 kHz +25C 01 -100 typical dBu Headroom 3/ THD + N 1 % +25C 01 23 typical dBu Frequency response section. Small signal bandwidth SSBW +25C 01 3.1 typical MHz Sl

23、ew rate SR +25C 01 14 typical V/s Settling time tS0.1 %, 10 V step, CL= 100 pF +25C 01 2 typical s 0.01 %, 10 V step, CL= 100 pF 3 typical Overload recovery time 50% overdrive +25C 01 3 typical s Channel separation (dual) f = 1 kHz +25C 01 117 typical dB Output noise 4/ voltage f = 20 Hz to 20 kHz +

24、25C 01 7 typical Vrms f = 1 kHz 52 typical nV/ Hz Offset voltage section. 5/ Input offset voltage VIOVCM= 0 V +25C 01 1000 V Input offset voltage versus temperature -55C to +125C 01 2 typical V/C Input offset voltage versus power supply VS= 4 V to 18 V -55C to +125C 01 60 V/V Input section. Common m

25、ode voltage range +VCMVO= 0 V +25C 01 2(+VS) - 5 V -VCM2(-VS) + 5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 6 TABLE I.

26、Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Input section - continued. Common mode rejection ratio CMRR VCM= 31 V, RS= 0 +25C 01 74 dB Common mode rejection ratio versus temperature CMRR VCM= 31 V, RS= 0 -55C to +125C 0

27、1 72 dB Impedance, 6/ differential +25C 01 50 typical k Impedance, common mode +25C 01 50 typical k Gain section. Initial gain +25C 01 1 typical V/V Error gain LE VO= -16 V to +16 V +25C 01 0.1 % Error gain versus temperature LE VO= -16 V to +16 V -55C to +125C 01 3.5 % Nonlinearity error gain VO= -

28、16 V to +16 V +25C 01 0.0001 typical % Output section. Positive output voltage +VO+25C 01 +VS- 2 V Positive output voltage versus temperature +VO-55C to +125C 01 +VS- 2.45 V Negative output voltage -VO+25C 01 -VS+ 2 V Negative output voltage versus temperature -VO-55C to +125C 01 -VS+ 2.45 V Current

29、 limit, continuous to common +25C 01 60 typical mA Capacitive load (stable operation) +25C 01 500 typical pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 162

30、36 DWG NO. V62/12613 REV A PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Power supply section. Rated voltage +25C 01 18 typical V Voltage range +25C 01 4 18 V Quiescent current (per amplifier) IO= 0 A +25C

31、 01 2.9 mA Quiescent current (per amplifier) versus temperature IO= 0 A -55C to +125C 01 3.1 mA Temperature range section. Specified temperature range 01 -55 +125 C Operating temperature range 01 -55 +125 C Storage temperature range 01 -65 +150 C Thermal resistance JA 01 200 typical C 1/ Testing and

32、 other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametri

33、c testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, VS= 18 V, RL= 2 k, and REF pin connected to ground. 3/ dBu = 20 log (Vrms/0.7746). 4/ Includes effects of amplifiers input current noise and thermal noise contribution of resistor network. 5/

34、Includes effects of amplifiers input bias and offset currents. 6/ 25 k resistors are ratio matched, but have 25% absolute value. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO.

35、V62/12613 REV A PAGE 8 Case X FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 9 Case X Symbol Dimensions Inches Millimeters Min Max

36、Min Max A - .069 - 1.75 A1 .004 .010 0.10 0.25 b .012 .020 0.31 0.51 c .005 .010 0.13 0.25 D .337 .344 8.55 8.75 e .050 BSC 1.27 BSC E .150 .157 3.80 4.00 E1 .228 .244 5.80 6.20 L .016 .050 0.40 1.27 n 14 leads 14 leads NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for r

37、eference only. 2. For dimension D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end. 3. For dimension E, body width does not include interlead flash. Interlead flash shall not exceed 0.017 inch (0.

38、43 mm) per side. 4. Falls within reference to JEDEC MS-012-AB. FIGURE 1. Case outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 10 Device

39、 type 01 Case outline X Terminal number Terminal symbol Description 1 NC No connection. 2 -INPUT A Inverting input A. 3 +INPUT A Noninverting input A. 4 -VSNegative power supply. 5 +INPUT B Noninverting input B. 6 -INPUT B Inverting input B. 7 NC No connection. 8 REF B Reference input B. 9 OUTPUT B

40、Output B. 10 SENSE B Current sense B. 11 +VSPositive power supply. 12 SENSE A Current sense A. 13 OUTPUT A Output A. 14 REF A Reference input A. NC = No connection FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LA

41、ND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12613 REV A PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should incl

42、ude proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial pr

43、actices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The

44、device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a

45、source of supply for the item. Vendor item drawing administrative control number 1/ 2/ 3/ Device manufacturer CAGE code Top side marking Transport media Vendor part number V62/12613-01XE 01295 INA2134M Tape and reel INA2134MDREP Tube INA2134MDEP 1/ The vendor item drawing establishes an administrati

46、ve control number for identifying the item on the engineering documentation. 2/ For the most current package and ordering information, see the package option addendum at the end of the manufacturers data sheet. 3/ Package drawings, standard packaging quantities, thermal data, symbolization, and prin

47、ted circuit board (PCB) design guidelines are available from the manufacturer. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-