REG NASA-LLIS-0839-2000 Lessons Learned Fault-Detection Fault-Isolation and Recovery (FDIR) Techniques.pdf
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1、Best Practices Entry: Best Practice Info:a71 Committee Approval Date: 2000-04-20a71 Center Point of Contact: JSCa71 Submitted by: Wil HarkinsSubject: Fault-Detection, Fault-Isolation and Recovery (FDIR) Techniques Practice: Apply techniques such as Built in Test (BIT), strategic placing of sensors,
2、centralized architecture, and fault isolation and recovery to optimize system availability.Programs that Certify Usage: This practice has been used on International Space Station Program.Center to Contact for Information: JSCImplementation Method: This Lesson Learned is based on Maintainability Tech
3、nique number DFE-7 from NASA Technical Memorandum 4628, Recommended Techniques for Effective Maintainability.Benefit:The main goal of fault detection and isolation is to effectively detect faults and accurately isolate them to a failed component in the shortest time possible. This capability leads t
4、o reduction in diagnostic time or downtime in general and, therefore, increased system availability. A good inherent diagnostic of a system also enhances the crewmembers confidence in operating the system, the main driver of mission success. Effective FDIR can keep a difficult to maintain system up
5、and running where normal methods would lead to system downtime. FDIR is especially beneficial to an on-orbit system where maintenance may be impossible.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Implementation Method:The growth of electronic tec
6、hnology challenges the use of electronic systems in several respects. One of these is the complexity of testing the systems to determine functional status and to permit efficient fault detection and fault isolation. The term “diagnostic capabilities“ refers to the abilities of a system to detect a f
7、ailure and to isolate it to a failed maintainable unit. In the past, diagnostics were considered only as a design afterthought and, as a result, many programs are faced with higher mean time to repair (MTTR) and higher work-hour and false alarm rates. This reduces system availability and operational
8、 readiness while increasing life cycle costs. Diagnostics are a significant key to achieving system performance and cost effectiveness goals.In such a critical system as the International Space Station, on which human life is dependent, a system recovery concept is also an important aspect that need
9、s to be considered early in the systems design phase. This technique consists of sections on fault-detection, fault-isolation, and recovery techniques. Since they are all related under the integrated diagnostics concept, techniques of one section may be referenced in other sections.Fault-Detection T
10、echniquesA system fault can be detected manually or automatically, depending on operating modes and how quickly the system needs to be restored. For a system that requires human interfaces, system failures can be detected quickly by human visual and/or auditory senses. If, for example, a light is sw
11、itched on and there is no illumination, one can visually detect that there is a problem with either the light switch, light bulb, power source, or circuitry. The obvious advantages of manual fault detection are that it incurs no costs associated with complex system designs.Another common methodology
12、, built-in testing (BIT), is employed to detect and isolate faults without using external test equipment. BIT ranges in complexity from a lamp that lights when equipment fails, to a resident computer that generates test signals and evaluates system responses. BIT can be continuously operated, interl
13、eaved with other operations, or initiated on command. During power-on self-testing, for example, the system runs a self-diagnostic test after the power is applied and includes hardware sensors and software error correcting codes. Its particular mechanization and utilization in a system are, of cours
14、e, determined by the designer.BIT often means additional hardware above that required for the primary function. Reliability and cost are affected and tradeoffs leading to a balanced solution must be made. BIT protective circuitry, moreover, should be designed to be fail-safe. This means that failure
15、 in the BIT circuitry should not affect system performance. Whenever feasible, the BIT input and output should be sufficiently isolated from the normal channels so that any failure in the BIT will not cause impairment of the function being tested. Also, it should be recognized that BIT can fail, and
16、 additional measures should be taken to avoid utilization of possibly erroneous BIT output in recovery measures.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-In addition to BIT circuitry which actuates visual status indicators, BIT features may als
17、o include test points and self-test meters. The goal of BIT design is to decrease MTTR by steering a technician to the faulty component as quickly as possible. BIT designers attempt to attain this goal through various means, including the use of innovative circuitry and rearrangement of circuits to
18、perform dual functions with a single circuit, if possible; e.g., driving a visual indicator and tying into various AND gates with a single driver.The BIT designer also standardizes BIT circuitry as much as possible, thus driving down the cost of implementing BIT.Other important general consideration
19、s in designing hardware BIT are:a. The reliability of the BIT hardware should exceed that of the hardware being tested. If this is not the case, the probability of failure of the BIT may be almost as great as the probability of failure of the unit being tested.b. The BIT should be kept simple but ef
20、fective in meeting operational needs.c. The type of circuitry used for BIT should be, if feasible, of the same type used in the normal system to minimize the number of different types of components used in any particular system.d. As a part of the BIT design process, the overall system architecture
21、must also be considered for the most effective implementation. Generally, there are two common approaches: centralization and decentralization.Centralization is regarded as a highly integrated approach in which a centralized unit acts as a “watch dog“ in detecting and reporting system out-of-toleran
22、ce conditions. The centralized unit determines if a failure actually occurred based on the data and information queried from the lower level, and annunciates or reports faults (see figure 1).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-refer to D
23、descriptionD Figure 1. Centralized Architecture The type of information acquired by the central unit is an example of passive BIT. Passive BIT monitors system performance on line without the use of a test pattern generator; therefore, it may not be able to completely monitor the system.Active BIT, a
24、 more comprehensive type of testing, can also be used. In active BIT, a test pattern is written to a unit and compared to an expected pattern. The system operation must be interrupted for this type of test if the module is operating. Not all modules are operated continuously, however, and a computer
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