DLA SMD-5962-84071 REV H-2009 MICROCIRCUIT DIGITAL HIGH SPEED CMOS THREE-STATE OCTAL D-TYPE FLIP-FLOP MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Add vendor CAGE 27014 to device 012X. Convert to military drawing format including change of drawing CAGE number. Editorial changes throughout. Inactivate device 01RX for new design. 87-11-24 M. A. Frye C Technical changes in 1.4 and Table I. Add
2、 test circuit to figure 3. Editorial changes throughout. 89-04-21 M. A. Frye D Changes in accordance with NOR 5962-R186-92. 92-09-08 M. L. Poelking E Add vendor CAGE F8859. Add class V device criteria. Editorial changes throughout. -ljs 99-11-09 Raymond Monnin F Correct data limits in paragraph 1.3
3、and test conditions in Table I. Add case outline X. Add Table III, delta limits. Editorial changes throughout. -ljs 00-07-13 Raymond Monnin G Correct table II. Update boilerplate to MIL-PRF- 38535 requirements. jak 02-01-14 Thomas M. Hess H Add JEDEC Standard 7-A reference in paragraphs 2.2 and 4.4.
4、1c. Update boilerplate paragraphs to the current requirements as specified in MIL-PRF-38535. - jak 09-10-21 Thomas M. Hess Current CAGE CODE is 67268. REV SHEET REV H SHEET 15 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. K
5、elleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, THREE-STATE OCTAL D-TYPE FLIP-FLOP, AND
6、 AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-09-28 MONOLITHIC SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 84071 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E002-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
7、MICROCIRCUIT DRAWING SIZE A 84071 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (devic
8、e class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M
9、 and Q: 84071 01 R A Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For device class V: 5962 - 84071 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1
10、.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marke
11、d with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC374 Three-state octal D-type flip-flop 1.2.3 Device class designator. The device class d
12、esignator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class De
13、vice requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networki
14、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84071 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Des
15、criptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X See figure 1 20 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF
16、-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp diode current (IIK) . 20 mA Output clamp diode
17、 current (IOK) . 20 mA Continuous output current . 35 mA Continuous current through VCCor GND 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 J
18、unction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1,000 ns CC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns Minimum se
19、tup time (ts): TC= +25C: VCC= 2.0 V . 100 ns CC= 4.5 V . 20 ns VCC= 6.0 V . 17 ns TC= -55C to +125C: VCC= 2.0 V . 150 ns CC= 4.5 V . 30 ns VCC= 6.0 V . 25 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade p
20、erformance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3 The limits for the parameters speified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Ma
21、ximum junction temperature shall not be exceeded except for allowable short circuit duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ
22、E A 84071 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions Continued. Minimum pulse width (tw): TC= +25C: VCC= 2.0 V . 80 ns CC= 4.5 V . 16 ns VCC= 6.0 V . 14 ns TC= -55C to +125C: VCC= 2.0 V . 120 ns CC= 4.5
23、 V . 24 ns VCC= 6.0 V . 20 ns Minimum hold time (th): TC= +25C: VCC= 2.0 V . 10 ns CC= 4.5 V . 5 ns VCC= 6.0 V . 5 ns TC= -55C to +125C: VCC= 2.0 V . 13 ns CC= 4.5 V . 5 ns VCC= 6.0 V . 5 ns Maximum clock frequency (fmax): TC= +25C: VCC= 2.0 V . 6 MHz CC= 4.5 V . 30 MHz VCC= 6.0 V . 35 MHz TC= -55C
24、to +125C: VCC= 2.0 V . 4 MHz CC= 4.5 V . 20 MHz VCC= 6.0 V . 24 MHz Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84071 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM
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