DLA SMD-5962-89790 REV A-2008 MICROCIRCUIT MEMORY DIGITAL CMOS 4K x 4 STATIC RAM WITH SEPARATE I O MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate as part of 5 year review. ksr 08-11-04 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV A A SHET 15 16 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 1

2、2 13 14 PMIC N/A PREPARED BY Jeffery D. Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Frye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFEN

3、SE DRAWING APPROVAL DATE 92-12-21 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K x 4 STATIC RAM WITH SEPARATE I/O, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89790 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E023-09 Provided by IHSNot for ResaleNo reproduction or networking permi

4、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B mi

5、crocircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962- 89790 01 K A | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device

6、 type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 1/ 4K X 4 CMOS SRAM with separate I/O 20 ns (data retention) 02 1/ 4K X 4 CMOS SRAM with separate I/O 20 ns 03 1/ 4K X 4 CMOS SRAM with separate I/O 15 ns (data ret

7、ention) 04 1/ 4K X 4 CMOS SRAM with separate I/O 15 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat package L GDIP3-T24 or CDIP4-T24 24 dual-in-line pa

8、ckage 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Terminal voltage range with respect to ground. -0.5 V dc to +7.0 V dc DC output current . 20 mA Storage temperature range -65C to +150C Maximum powe

9、r dissipation (PD): 2/ 1.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . Case K, L, and 3 See MIL-STD-1835 Junction Temperature (TJ) +150C 2/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltag

10、e range (VIH) 2.2 V dc to 6.0 V dc Maximum low level input low voltage (VIL) -0.5 V dc to +0.8 V dc 3/ Case operating temperature range (TC) -55C to +125C 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed i

11、n MIL-HDBK-103. 2/ Maximum junction temperature may be increased to +175C during burn-in and steady state life. 3/ VIL(minimum) = -3.0 V dc for pulse width less than 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

12、 SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent s

13、pecified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Sta

14、ndard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mi

15、l/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in t

16、his document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Pro

17、duct built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and

18、 qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MI

19、L-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with

20、 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix A. If the test patterns

21、 cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. Alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity

22、upon request. 3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at

23、5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after se

24、al. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

25、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical test

26、s for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking the entire SMD PIN number is not fea

27、sible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be rep

28、laced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6

29、herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as re

30、quired in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent and the acquiring a

31、ctivity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-

32、PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test (method 1015 of MIL-STD-883). (1) Test conditions C or

33、 D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the

34、 intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance i

35、nspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, m

36、ethod 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is fifteen devices with no failures, and all input and output terminals tested. d. Subgroups

37、 7, 8A, and 8B shall include verification of the truth table. e. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. Procedures and circuits shall be maintained under document revision level con

38、trol by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for refer

39、ence. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characterist

40、ics. Test Device type Limits Symbol Conditions 4.5 V VCC 5.5 V -55C TC +125C unless otherwise specified Group A subgroupsMin Max Unit Output high voltage VOHVCC= 4.5 V, VIL= 0.8 V, IOH= -4.0 mA, VIH= 2.2 V 1, 2, 3 All 2.4 V Output low voltage IOL= 10 mA 1/ All 0.5 VOLVCC= 4.5 V VIL= 0.8 V VIH= 2.2 V

41、 IOL= 8.0 mA 1, 2, 3 All 0.4 V 01, 03 5.0 Input leakage current ILIVCC= 5.5 V, GND VIN VCC1, 2, 3 02, 04 10 A 01, 03 5.0 Output leakage current ILOVCC= 5.5 V, CS = VIHGND VOUT VCC1, 2, 3 02, 04 10 A Operating power supply 01 80 02 100 03 90 current ICC1VCC= 5.5 V, CS = VILf = 0 2/, outputs open, WE

42、, An, and Dn = 2.2 V 1, 2, 3 04 120 mA 01 110 02, 03 120 Dynamic operating current ICC2VCC= 5.5 V, CS = VIL, f = f MAX2/, WE = 3.0 V, outputs open, An, and Dn toggling between 0 V and 3.0 V 1, 2, 3 04 165 mA 01 35 02 55 03 40 Standby power supply current (TTL levels) ICC3VCC= 5.5 V, CS VIH, f = f MA

43、X2/, WE = 3.0 V, outputs open, An, and Dn toggling between 0 V and 3.0 V 1, 2, 3 04 65 mA 01, 03 5.0 Full standby power supply current (CMOS levels) ICC4VCC= 5.5 V, CS 5.3 V, f = 0 2/, VIN 5.3 V or 0.2 V 1, 2, 3 02, 04 30 mA VCCfor data retention VDRCS VCC-0.2 V, VIN VCC-0.2 V or 0.2 V 1, 2, 3 01, 0

44、3 2.0 V ICCDR1VCC= 2.0 V 1, 2, 3 01, 03 100 Data retention current: ICCDR2VCC= 3.0 V 1, 2, 3 01, 03 150 A Input capacitance CINVCC= 5.0 V, VIN =0 V, f = 1.0 MHz, TA= +25C, See 4.3.1c 4 All 8 pF Output capacitance COUTVCC = 5.0 V, VI/O = 0 V, f = 1.0 MHz, TA= +25C See 4.3.1c 4 All 8 pF Functional tes

45、ts See 4.3.1.d 7, 8A, 8B All See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 A

46、PR 97 TABLE I. Electrical performance characteristics - Continued. Limits Unit Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device Types Min Max 01, 02 20 Read cycle time 3/ tAVAV03, 04 15 01, 02 20 Address access time 3/ tAVQV03, 04 15 Output hold

47、 from address change 3/ tAVQXAll 3.0 01, 02 20 Chip select access time 3/ tELQV03, 04 15 Chip select to output in low Z 1/ 4/ tELQXAll 5.0 01, 02 9.0 Chip deselect to output in high Z 1/ 4/ tEHQZ03, 04 8.0 Chip select to power-up time 1/ 3/ tELPUAll 0 01, 02 20 Chip deselect to power-down time 1/ 3/

48、 tEHPDSee figures 3 and 4 03, 04 15 01, 02 20 Write cycle time 3/ tAVAV03, 04 15 01, 02 20 Chip select to end of write 3/ tELEH03, 04 15 01, 02 20 Address valid to end of write 3/ tAVWH tAVEHSee figures 3 and 5 9, 10, 11 03, 04 15 ns See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89790 DEFENSE SUPPLY CENTER COLUMBUS