DLA SMD-5962-87654 REV E-2011 MICROCIRCUIT DIGITAL FAST CMOS 1-of-8 DECODER TTL COMPATIBLE MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02. Add case outline F. Technical changes in table I and table II. Technical changes in 4.3.1c. Editorial changes in figure 4. Editorial changes throughout. 89-02-06 M. A. Frye B Changes in accordance with notice of revision 5962-

2、R185-92. jak 92-07-22 Monica L. Poelking C Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-07-12 Thomas M. Hess D Add footnote 5/ for test condition of total power supply current (ICC) to table I. LTG 09-12-14 Thomas M. Hess E Made t

3、echnical change in table I, Low level output voltage VOL, IOL= 32 mA max column. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-07-26 Thomas M. Hess REV SHET REV SHET REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Marci

4、a B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Ray Monnin APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITA

5、L, FAST CMOS, 1-of-8 DECODER, TTL COMPATIBLE, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-11-30 REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87654 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E445-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

6、RD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, app

7、endix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87654 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type

8、Generic number Circuit function 01 54FCT138 1-of-8 decoder, TTL compatible 02 54FCT138A 1-of-8 decoder, TTL compatible 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 1

9、6 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) 2/ -0.5

10、V dc to VCC + 0.5 V dc DC output voltage range (VOUT) 2/ . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC output current (IOUT) 100 mA Maximum power dissipation (PD) 3/ . 500 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Stora

11、ge temperature range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level Input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH)

12、 2.0 V dc Case operating temperature range (TC) -55C to +125C 1/ Unless other wise specified, all voltages are referenced to ground. 2/ For VCC 6.5 V dc, the upper bound is limited to VCC. 3/ Must withstand the added PDdue to short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproductio

13、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specific

14、ation, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Speci

15、fication for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings.

16、(Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the refe

17、rences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-385

18、35, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed

19、as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, f

20、it, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, a

21、nd physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be a

22、s specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, th

23、e electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described i

24、n table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with

25、 MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“

26、on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify w

27、hen the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to list

28、ing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of mi

29、crocircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the o

30、ption to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

31、 A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC+125C VCC= 5.0 V 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max Hig

32、h level output voltage VOHVIL= 0.8 V VIH= 2.0 V IOH= -300 A All 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 2.0 V IOH= -12 mA All 4.5 V 2.4 Low level output voltage VOLVIL= 0.8 V VIH= 2.0 V IOL= +300 A All 4.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 2.0 V IOL= +32 mA All 4.5 V 0.6 Input clamp voltage VIKIIN= -18 mA

33、 All 4.5 V 1 -1.2 V High level input current IIHVIN= 5.5 V All 5.5 V 1, 2, 3 5.0 A Low level input current IILVIN= GND All 5.5 V 1, 2, 3 -5.0 A Short circuit output current IOS1/ All 5.5 V 1, 2, 3 -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= 0 MHz All 5.5 V 1, 2

34、, 3 1.5 mA Quiescent power supply current (TTL inputs) ICC2/ VIN= 3.4 V All 5.5 V 1, 2, 3 2.0 mA Dynamic power supply current ICCDOutputs open One input toggling 50% duty cycle VIN 0.2 V or VIN 5.3 V All 5.5 V 3/ 0.4 mA/ MHz Total power supply current ICC4/ 5/ Outputs open One input toggling 50% dut

35、y cycle VIN 0.2 V or VIN 5.3 V fi= 10 MHz All 5.5 V 1, 2, 3 5.5 mA Outputs open One input toggling 50% duty cycle VIN= 3.4 V or VIN= GND fi= 2.5 MHz 01 5.5 V 1, 2, 3 6.0 mA 02 5.5Input capacitance CINSee 4.3.1c All 4 10 pF Output capacitance COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d All

36、 7, 8 Propagation delay time, Am to On tPLH1, tPHL1CL= 50 pF 10% RL= 500 5% See figure 4 01 4.5 V 9, 10, 11 1.0 12.0 ns 02 1.0 7.8Propagation delay time, E1 or E2 to On tPLH2, tPHL201 4.5 V 9, 10, 11 1.0 12.5 ns 02 1.0 8.0Propagation delay time, E3 to On tPLH3, tPHL301 4.5 V 9, 10, 11 1.0 12.5 ns 02

37、 1.0 8.0See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical

38、performance characteristics Continued. 1/ Not more than one output should be shorted at one time and the duration of the short circuit condition should not exceed 1 second. 2/ In accordance with TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable

39、but is derived for use in total power supply calculations. 4/ ICC= ICCQ+ (ICCx DHx NT) + ICCD(fIx NI), where: DH= Duty cycle for TTL inputs high. NT= Number of TTL inputs at DH. fI= Input frequency in MHz. NI= Number of inputs at fI. 5/ For ICCtest in an ATE environment, the effect of parasitic outp

40、ut capacitive loading from the test environment must be taken into account, as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offset factors must be applied to the test result. Device types 01 and 02 Case outlines E and F 2 Terminal nu

41、mber Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A0 A1 A2 E1 E2 E3 O7 GND O6 O5 O4 O3 O2 O1 O0 VCC- - - - - - - - - - - - NC A0 A1 A2 E1 NC E2 E3 O7 GND NC O6 O5 O4 O3 NC O2 O1 O0 VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo re

42、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 H X X X X X H H H H H H H H X H X X

43、X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L L = Low voltage level H = Hi

44、gh voltage level X = Irrelevant FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 D

45、SCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF or equivalent (includes test jig and probe capacitance). 2. RL= 500 or equivalent. 3. Input characteristics: tr= tf= 2.5 ns (10% to 90%). FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted with

46、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87654 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix

47、A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test ci

48、rcuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the