DLA DSCC-VID-V62 12626-2012 MICROCIRCUIT LINEAR CMOS 3 MHz LOW POWER DUAL OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ Original
2、 date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, CMOS, 3 MHz, LOW POWER, DUAL OPERATIONAL AMPLIFIER, MONOLITHIC SILICON 12-10-09 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12626 REV PAGE 1 OF 12 AMSC N/A 5962-V091-12 Provided by IHSNot for
3、ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12626 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance CMOS, 3 MHz, low power, dual operational
4、amplifier microcircuit, with an operating temperature range of -40C to +150C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering d
5、ocumentation: V62/12626 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 OPA2314 CMOS, 3 MHz, low power, dual operational amplifier 1.2.2 Case outline(s). The case outline(s) are as specifie
6、d herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 See figure 1 Plastic bottom terminal chip carrier with thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot sold
7、er dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12626 REV PAGE 3 1.3 Absolute maximum ratings
8、. 1/ Supply voltage (VS) 7 V Signal input terminals: Voltage . -VS 0.5 V to +VS+ 0.5 V 2/ Current . 10 mA 2/ Output short circuit . Continuous 3/ Power dissipation (PD) . 2.42 mW Junction temperature range (TJ) +170C Storage temperature range (TSTG) -65C to +150C Electrostatic discharge (ESD) rating
9、: Human body model (HBM) . 4,000 V Charged device model (CDM) 1,000 V Machine model (MM) . 200 V 1.4 Recommended operating conditions. 4/ Supply voltage range (VS) +1.8 V to +5.5 V Operating free-air temperature range (TA) . -40C to +150C 1.5 Thermal characteristics. Thermal metric Symbol Case X Uni
10、t Thermal resistance, junction-to-ambient JA53.8 C/W Thermal resistance, junction-to-case (top) JC(TOP)69.2 C/W Thermal resistance, junction-to-board JB20.1 C/W Characterization parameter, junction-to-top JT3.8 C/W Characterization parameter, junction-to-board JB20.0 C/W Thermal resistance, junction
11、-to-case (bottom) JC(BOTTOM)11.6 C/W 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating co
12、nditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Input terminals are diode clamped to the power supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should be current limited to 10 mA or less.
13、 3/ Short circuit to ground, one amplifier per package. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSN
14、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12626 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 Registered and Standard Outlines for Semicondu
15、ctor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in
16、 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maxi
17、mum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The cas
18、e outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DW
19、G NO. V62/12626 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ 3/ VS= +1.8 V to +5.5 VTemperature, TA Device type Limits Unit Min Max Offset voltage Input offset voltage VOSVCM= +VS 1.3 V +25C 01 2.5 mV -40C to +150C 3.5 Input offset voltage versus temperatu
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