DLA SMD-5962-96744 REV A-1999 MICROCIRCUIT DIGITAL 3 3-V DIGITAL SIGNAL PROCESSOR 32-BIT MONOLITHIC SILICON《3 3伏特数字信号处理器32-BIT数字的硅单片电路微电路》.pdf
《DLA SMD-5962-96744 REV A-1999 MICROCIRCUIT DIGITAL 3 3-V DIGITAL SIGNAL PROCESSOR 32-BIT MONOLITHIC SILICON《3 3伏特数字信号处理器32-BIT数字的硅单片电路微电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96744 REV A-1999 MICROCIRCUIT DIGITAL 3 3-V DIGITAL SIGNAL PROCESSOR 32-BIT MONOLITHIC SILICON《3 3伏特数字信号处理器32-BIT数字的硅单片电路微电路》.pdf(56页珍藏版)》请在麦多课文档分享上搜索。
1、LTR A I Editorial changes to table I BI and changes to case outlines X and Y. - tmh I 99-11-24 I Monica L. Poelking DESCRIPTION DATE (YR-MO-DA) APPROVED PMIC NIA STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE I I I I PREPA
2、REDBY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS CHECKED BY COLUMBUS, OHIO 43216 Thanh V. Nguyen APPROVEDBY MICROCIRCUIT, DIGITAL, 3.3-V DIGITAL SIGNAL PROCESSOR, 32-BIT, MONOLITHIC SILICON Monica L. Poelking DRAWING APPROVAL DATE 99-04-07 AMSC NIA REVISION LEVEL A I 5962-96744 CAGE CODE I “a I
3、67268 I 1 OF 55 I SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited 5962-E058-00 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE REVISION LEVEL 1 .I Scope. This drawing documents two
4、 product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assuranc
5、e (RHA) levels are reflected in the PIN. SHEET 2 1.2 m. The PIN is as shown in the following example: f Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) I (see 1.2.3) V Drawing number 1.2.1 RHA
6、desiqnator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (
7、-) indicates a non-RHA device. 1.2.2 Device tvpels). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function o1 02 21 062L 21 060L 3.3-V digital signal processor, 32-bit, 2 Mbit SRAM 3.3-V digital signal processor, 32-bit, 4 Mbit SRAM 1.2.3 Device cla
8、ss desiqnator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3
9、8535, appendix A QorV Certification and qualification to MIL-PRF-38535 1.2.4 Case outlinels). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desiqnator Terminals Packaqe style See figure 1 See figure 1 See figure 1 See figure 1 240 Gull wing flatpack
10、 cavity down heat sink 240 Gull wing flatpack cavity up heat sink 240 Flatpack with non-conductive tie-bar cavity down heat sink 240 Flatpack with non-conductive tie-bar cavity up heat sink 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-3853
11、5, appendix A for device class M. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.3 Absolute maximum ratincrs. 1/ REVISION LE
12、VEL Supply voltage range (VDD) Input voltage range (VIN) . Output voltage range (VOUT) . Load capacitance . Lead temperature (soldering, 5 seconds) . Storage temperature range (TSTG) . Maximum power dissipation (PD) Thermal resistance junction-to-case (OJC): Cases X,Y, T, and U . SHEET 3 -0.3 V dc t
13、o +4.6 V dc -0.3 V dc to VDD + 0.3 V dc -0.3 V dc to VDD + 0.3 V dc 200 pF +280“C -65C to +I 50C 5w 0.24“C/W 1.4 Recommended oi3eratina conditions. Supply voltage range (VDD) . +3.13 V dc to +3.47 V dc Case operating temperature range (TC) -55C to +125“C 1.5 Dicrital locric testincr for device class
14、es Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . XX percent 2/ 2. APPLICABLE DOCUMENTS 2.1 Government si3ecification. standards. and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specifi
15、ed herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENTOFDEFENSE MIL-PRF-38535 - Integrated Circuits, Man
16、ufacturing, General Specification for. STANDARDS DEPARTMENTOFDEFENSE MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines. HANDBOOKS DEPARTMENTOFDEFENSE MIL-HDBK-103 - MIL-HDBK-780 - S
17、tandard Microcircuit Drawings. List of Standard Microcircuit Drawings (SMDs). (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 191 11 -5094.) - I/ Stress ab
18、ove the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. - 2/ Values are not available. STAN DARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 I 5962-96744 DSCC
19、FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are
20、 DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. REVISION LEVEL INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) SHEET 4
21、IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Applications for copies should be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-41 50.) (Non-Government standards and other publications are normally avail
22、able from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this
23、 drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as
24、specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non
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