DLA SMD-5962-90899 REV D-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 128K X 8-BIT FLASH EEPROM MONOLITHIC SILICON《硅单块 互补金属氧化物半导体128K X 8比特动画电可擦可编程序只读存储器 数字主储存器微型电路》.pdf
《DLA SMD-5962-90899 REV D-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 128K X 8-BIT FLASH EEPROM MONOLITHIC SILICON《硅单块 互补金属氧化物半导体128K X 8比特动画电可擦可编程序只读存储器 数字主储存器微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-90899 REV D-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 128K X 8-BIT FLASH EEPROM MONOLITHIC SILICON《硅单块 互补金属氧化物半导体128K X 8比特动画电可擦可编程序只读存储器 数字主储存器微型电路》.pdf(27页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate. Added device types 09 - 13. Moved endurance and data retention testing requirements from Section 4 of drawing to Section 3 of drawing. Editorial changes throughout. 94-03-25 M. A. Frye B Updated boilerplate. Added vendor CAGE
2、 01295 as a source of supply. Editorial changes throughout. - glg 98-04-16 Raymond Monnin C Changed standoff width on “U“ package. Added vendor CAGE 0EU86 as a source of supply. - glg 99-11-16 Raymond Monnin D Boilerplate update and part of five year review. tcr 06-12-21 Raymond Monnin REV SHEET REV
3、 D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/w
4、ww.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K X 8-BIT FLASH EEPROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-08-31 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268
5、 5962-90899 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E080-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90899 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2
6、234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN)
7、. When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90899 01 Q X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2
8、.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RH
9、A levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time Endurance 01 28F010 (128 K x 8) CMOS flash EEPROM 250 ns 10,0
10、00 cycles 02 28F010 (128 K x 8) CMOS flash EEPROM 200 ns 10,000 cycles 03 28F010 (128 K x 8) CMOS flash EEPROM 150 ns 10,000 cycles 04 28F010 (128 K x 8) CMOS flash EEPROM 120 ns 10,000 cycles 05 28F010 (128 K x 8) CMOS flash EEPROM 250 ns 1,000 cycles 06 28F010 (128 K x 8) CMOS flash EEPROM 200 ns
11、1,000 cycles 07 28F010 (128 K x 8) CMOS flash EEPROM 150 ns 1,000 cycles 08 28F010 (128 K x 8) CMOS flash EEPROM 120 ns 1,000 cycles 09 28F010 (128 K x 8) CMOS flash EEPROM 90 ns 10,000 cycles 10 28F010A (128 K x 8) CMOS flash EEPROM 250 ns 100,000 cycles 11 28F010A (128 K x 8) CMOS flash EEPROM 200
12、 ns 100,000 cycles 12 28F010A (128 K x 8) CMOS flash EEPROM 150 ns 100,000 cycles 13 28F010A (128 K x 8) CMOS flash EEPROM 120 ns 100,000 cycles 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requi
13、rements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MI
14、L-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style T See figure 1 32 “J“ lead chip carrier U See figure 1 32 Flat pack X GDIP1-T32 or CDIP2-T32 32 Dual-in-line Y CQCC1-N32 32 Rectangular leadless chip carrier Z See figure 1 32 Gullwing lead chip carrier Provided
15、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90899 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as specified in MIL-
16、PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Endurance: Device types 01-04, 0910,000 cycles/byte, minimum Device types 05-081,000 cycles/byte, minimum Device types 10-13100,000 cycles/byte, minimum Supply voltage range (VCC) 2
17、/ -2.0 V dc to +7.0 V dc Storage temperature range (Tstg) -65C to +150C Maximum power dissipation (PD) 1.0 W Lead temperature (soldering, 10 seconds)+300C Junction temperature (TJ) 3/ +150C Thermal resistance, junction-to-case (JC) (case outline X, Y) .See MIL-STD-1835 Thermal resistance, junction-t
18、o-case (JC) (case outlines T, Z)13C/W Thermal resistance, junction-to-case (JC) (case outline U) .27C/W Voltage on any pin with respect to ground 2/ .-2.0 V dc to +7.0 V dc Voltage on pin A9with respect to ground 4/ .-2.0 V dc to +13.5 V dc VPPsupply voltage with respect to ground 4/ .-2.0 V dc to +
19、14.0 V dc VCCsupply voltage with respect to ground 2/ .-2.0 V dc to +7.0 V dc Output short circuit current 5/.200 mA Data retention .10 years minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) .+4.5 V dc to +5.5 V dc Operating temperature range (Tcase) .-55C to +125C Low level
20、input voltage range (VIL)-0.5 V dc to +0.8 V dc High level input voltage range (VIH).+2.0 V dc to VCC+0.5 V dc High level input voltage range, CMOS (VIH)VCC-0.5 V dc to VCC+0.5 V dc Chip clear (VP) 11.4 V dc to 12.6 V dc 1.5 Digital logic testing for device classes Q and V. Fault coverage measuremen
21、t of manufacturing logic tests (MIL-STD-883, method 5012) 100 percent 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Minimum dc voltage on input or VOpins is -0.5 V. D
22、uring voltage transitions, inputs may overshoot VSSto -2.0 V for periods of up to 20 ns. Maximum dc voltage on output and VOpins is VCC+0.5 V. During voltage transitions outputs may overshoot to VCC+2.0 V for periods up to 20 ns. 3/ Maximum junction temperature shall not be exceeded except for allow
23、able short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Minimum dc input voltage on A9or VPPmay overshoot to +14.0 V for periods less than 20 ns. 5/ No more than one output shorted at a time. Duration of short circuit should not be greater than 1 second. 6/
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