DLA SMD-5962-87655 REV D-2010 MICROCIRCUIT DIGITAL FAST CMOS INVERTING OCTAL LINE DRIVER BUFFER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE number 75569. Add device type 02. Add case outline S. Technical changes in table I. Editorial changes throughout. 89-03-28 D. M. Cool B Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 03-08-22 T

2、homas M. Hess C Add footnote 5/ for test condition of total power supply current (ICC) to table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 10-01-14 Thomas M. Hess D Add footnote 7/ for total power supply current (ICC) in table I. Update boilerplate paragraphs t

3、o the current MIL-PRF-38535 requirements. - MAA 10-12-28 Thomas M. Hess REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Poelking DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIR

4、CUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Ray Monnin APPROVED BY D. M. Cool MICROCIRCUIT, DIGITAL, FAST CMOS, INVERTING OCTAL LINE DRIVER/BUFFER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING AP

5、PROVAL DATE 87-11-03 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-87655 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E140-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME CO

6、LUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is

7、 as shown in the following example: 5962-87655 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT240 Inverting octal line d

8、river/buffer with three-state, TTL compatible inputs 02 54FCT240A Inverting octal line driver/buffer with three-state, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GD

9、IP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range . -0.5 V dc to +6.0 V dc Input voltage range -

10、0.5 V dc to VCC+ 0.5 V dc Output voltage range -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IOK) . -50 mA DC output current . 100 mA Maximum power dissipation (PD) 2/ 500 mW Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Storage temperature

11、range -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH) . 2.0 V dc Case operati

12、ng temperature range (TC) . -55C to +125C 1/ All voltages are referenced to GND. 2/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA L

13、AND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise

14、 specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

15、 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Stand

16、ardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersede

17、s applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that

18、 is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval i

19、n accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “Q

20、ML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s).

21、 The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5

22、 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full (case

23、 or ambient) operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

24、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In

25、addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be mar

26、ked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance

27、 shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL

28、-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Mar

29、itime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall

30、 be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 T

31、ABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type Group A subgroups Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOH= -300 A All 1, 2, 3 4.3 V IOH= -12 mA All 1, 2, 3

32、2.4 Low level output voltage VOLVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOL= +300 A All 1, 2, 3 0.2 V IOL= +32 mA All 1, 2, 3 0.5 Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA All 1 -1.2 V High level input current IIHVCC= 5.5 V, VIN= 5.5 V All 1, 2, 3 5.0 A Low level input current IILVCC= 5.5 V, VIN= GND

33、All 1, 2, 3 -5.0 A High impedance output current IOZHVCC= 5.5 V, VIN= 5.5 V All 1, 2, 3 10 A IOZLVCC= 5.5 V, VIN= GND All 1, 2, 3 -10 Short circuit output current IOSVCC= 5.5 V 1/ All 1, 2, 3 -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V VCC= 5.5 V fi= 0 MHz All 1, 2

34、, 3 1.5 mA Quiescent power supply current (TTL inputs) ICCVCC = 5.5 V VIN= 3.4 V 2/ All 1, 2, 3 2.0 mA Dynamic power supply current ICCDVCC= 5.5 V OE = GND VIN 5.3 V or VIN 0.2 V One bit toggling 50% duty cycle Output open All 3/ 0.25 mA/MHz Total power supply current 4/ 5/ 7/ ICCVCC= 5.5 V Outputs

35、open OE = GND One bit toggling 50% duty cycle fi= 10 MHz VIN 5.3 V or VIN 0.2 V All 1, 2, 3 4.0 mA VIN 3.4 V or VIN= GND All 1, 2, 3 4.8 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

36、IZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type Group A subgroups Limits Unit M

37、in Max Input capacitance CINSee 4.3.1c All 4 10 pF Output capacitance COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d All 7, 8 Propagation delay time, Dnto On tPLH, tPHLCL= 50 pF 10% RL= 500 5% See figure 4 6/ 01 9, 10, 11 1.5 9.0 ns 02 9, 10, 11 1.5 5.1 Output enable time, OEnto On tPZH, tPZ

38、L01 9, 10, 11 1.5 10.5 ns 02 9, 10, 11 1.5 6.5 Output disable time, OEnto On tPHZ, tPLZ01 9, 10, 11 1.5 12.5 ns 02 9, 10, 11 1.5 5.9 1/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed one second. 2/ TTL driven input (VIN= 3.4

39、V); all other inputs at VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ ICC= ICCQ+ (ICCx DHx NT) + (ICCDx fIx NI) Where: DH= Duty cycle for TTL inputs high. NT= Number of TTL inputs at DH.fI= Input frequency in MHz. NI= Number of i

40、nputs at fI. 5/ For ICCtest in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account, as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offset factors must be applied

41、 to the test result. 6/ The minimum limits are guaranteed, if not tested, to the specified limits. 7/ The Supplier/ Vendor (cage code 0C7V7 ) devices meet total power supply current limit, Icc = 5.5 mA at VIN 5.3 V or VIN 0.2 V, and Icc = 6.0 mA at VIN 3.4 V or VIN= GND; although table I stated Icc

42、= 4.0 mA and 4.8 mA. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines R

43、, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OEADA0OB0DA1OB1DA2OB2DA3OB3GND DB3OA3DB2OA2DB1OA1DB0OA0OEBVCCFIGURE 1. Terminal connections. Device types 01 and 02 Inputs Output OEA, OEBDAn, DBn OAn, OBnL L H L H L H X Z L = Low voltage level H = High vo

44、ltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC F

45、ORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. Diagram

46、shown for input control enable low and input control disable high. 2. Pulse generator for all pulses: tf 2.5 ns, tr 2.5 ns. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

47、SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 Switch position Test Switch tPLZtPZLAll other Closed Closed Open NOTES: 1. RL= 500. 2. CL= 50 pF; load capacitance includes jig and probe capacitance. 3. RT= Termination resistance shoul

48、d be equal to ZOUTof pulse generators. FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87655 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-385