DLA DSCC-VID-V62 12629-2012 MICROCIRCUIT LINEAR LOW DISTORTION DIFFERENTIAL ADC DRIVER MONOLITHIC SILICON.pdf
《DLA DSCC-VID-V62 12629-2012 MICROCIRCUIT LINEAR LOW DISTORTION DIFFERENTIAL ADC DRIVER MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA DSCC-VID-V62 12629-2012 MICROCIRCUIT LINEAR LOW DISTORTION DIFFERENTIAL ADC DRIVER MONOLITHIC SILICON.pdf(12页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ Origina
2、l date of drawing YY MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, LINEAR, LOW DISTORTION DIFFERENTIAL ADC DRIVER, MONOLITHIC SILICON 12-10-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12629 REV PAGE 1 OF 12 AMSC N/A 5962-V007-13 Provided by IHSNot for ResaleNo reprodu
3、ction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12629 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low distortion differential ADC driver microcircuit, with
4、 an operating temperature range of -55C to +105C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12629 - 01
5、 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 AD8138-EP Low distortion differential ADC driver 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins
6、JEDEC PUB 95 Package style X 8 JEDEC MO-187-AA Mini Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash pa
7、lladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12629 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage . 5.5 V VOCMVSOutput voltage swing . See FIG
8、URE 5 and 6 Internal power dissipation 550 mW Operating temperature range: -55C to +105C Storage temperature range . -65C to 150C Lead temperature, (Soldering, 10 sec) . 300C Junction temperature 150C 1.4 Thermal characteristics. Thermal resistance Case outline JAUnit Case X 145 C/W 2. APPLICABLE DO
9、CUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.)
10、 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked
11、 with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3 and table I herein. 3.4 Design, construction, and physical dimension.
12、The design, construction, and physical dimensions are as specified herein. 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those in
13、dicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SI
14、ZE A CODE IDENT NO. 16236 DWG NO. V62/12629 REV PAGE 4 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in f
15、igure 3. 3.5.4 Maximum power dissipation vs ambient temperature. The maximum power dissipation vs ambient temperature shall be as shown in figure 4. 3.5.5 Differential output voltage swing vs ambient temperature, VS= 5 V. The differential output voltage swing vs ambient temperature, VS= 5 V shall be
16、 as shown in figure 5. 3.5.6 Differential output voltage swing vs ambient temperature, VS= 5 V. The differential output voltage swing vs ambient temperature, VS= 5 V shall be as shown in figure 6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA L
17、AND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12629 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions Limits Unit Min Typ Max DINTO OUT SPECIFICATIONS 2/ Dynamic performance -3 dB small signal bandwidth VOUT= 0.5 V p-p, CF= 0 pF 290
18、320 MHz TMINto TMAX3/ 256 VOUT= 0.5 V p-p, CF= 1 pF 225 Bandwidth for 0.1 dB Flatness VOUT= 0.5 V p-p, CF= 0 pF 30 Large signal bandwidth VOUT= 2 V p-p, CF= 0 pF 265 Slew rate VOUT= 2 V p-p, CF= 0 pF 1150 V/s Settling time 0.01%, VOUT= 2 V p-p, CF= 1 pF 16 ns Overdrive recovery time VIN= 5 V to 0 V
19、step, G = +2 4 Noise/Harmonic performance Second Harmonic VOUT= 0.5 V p-p, 5 MHz, RL, dm = 800 -94 dBc VOUT= 0.5 V p-p, 20 MHz, RL, dm = 800 -87 VOUT= 0.5 V p-p, 70 MHz, RL, dm = 800 -62 Third Harmonic VOUT= 0.5 V p-p, 5 MHz, RL, dm = 800 -114 VOUT= 0.5 V p-p, 20 MHz, RL, dm = 800 -85 VOUT= 0.5 V p-
20、p, 70 MHz, RL, dm = 800 -57 IMD 20 MHz -77 IP3 20 MHz 37 dBm Voltage noise (RTI) f = 100 kHz to 40 MHz 5 nv/Hz Input current noise f = 100 kHz to 40 MHz 2 pA/Hz Input characteristics Offset voltage VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = VOCM= 0 V -2.5 1 +2.5 mV TMINto TMAX3/ -4.8 +4.8 Input bias curr
21、ent 3.5 7 A TMINto TMAXvariation -0.01 A/C Input resistance Differential 6 M Common mode 3 Input capacitance 1 pF Input common mode voltage -4.7 to +3.4 V CMRR VOUT, dm/VIN, cm; VIN, cm= 1 V, -77 -70 dB TMINto TMAX3/ -69 Output characteristics Output voltage swing 4/ Maximum VOUT; single ended outpu
22、t 7.75 V p-p Output balance error VOUT, cm/VOUT, dm; VOUT, dm= 1 V, -66 dB See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12629 REV PAGE 6 TAB
23、LE I. Electrical performance characteristics - Continued. 1/ Test Symbol Test conditions Limits Unit Min Typ Max VOCMTO OUT SPECIFICATIONS 2/ Dynamic performance -3dB bandwidth 250 MHz Slew rate 330 V/s Noise Input voltage noise (RTI) f = 0.1 MHz to 100 MHz 17 nv/Hz DC performance Input voltage rang
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- DLADSCCVIDV62126292012MICROCIRCUITLINEARLOWDISTORTIONDIFFERENTIALADCDRIVERMONOLITHICSILICONPDF

链接地址:http://www.mydoc123.com/p-689356.html