BS EN 61191-6-2010 Printed board assemblies - Evaluation criteria for voids in soldered joints of BGA and LGA and measurement methods《印刷电路板组件 球栅阵列(BGA)和网格阵列(LGA)的焊接接头内空隙及测量方法用评定标准》.pdf

《BS EN 61191-6-2010 Printed board assemblies - Evaluation criteria for voids in soldered joints of BGA and LGA and measurement methods《印刷电路板组件 球栅阵列(BGA)和网格阵列(LGA)的焊接接头内空隙及测量方法用评定标准》.pdf》由会员分享，可在线阅读，更多相关《BS EN 61191-6-2010 Printed board assemblies - Evaluation criteria for voids in soldered joints of BGA and LGA and measurement methods《印刷电路板组件 球栅阵列(BGA)和网格阵列(LGA)的焊接接头内空隙及测量方法用评定标准》.pdf（42页珍藏版）》请在麦多课文档分享上搜索。

1、raising standards worldwideNO COPYING WITHOUT BSI PERMISSION EXCEPT AS PERMITTED BY COPYRIGHT LAWBSI Standards PublicationPrinted board assembliesPart 6: Evaluation criteria for voids in soldered joints of BGA and LGA and measurement methodsBS EN 61191-6:2010National forewordThis British Standard is

2、 the UK implementation of EN 61191-6:2010. It isidentical to IEC 61191-6:2010.The UK participation in its preparation was entrusted to Technical CommitteeEPL/501, Electronic assembly technology.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publ

3、ication does not purport to include all the necessary provisions of acontract. Users are responsible for its correct application. BSI 2010ISBN 978 0 580 59929 3ICS 31.180Compliance with a British Standard cannot confer immunity fromlegal obligations.This British Standard was published under the auth

4、ority of the StandardsPolicy and Strategy Committee on 31 May 2010.Amendments issued since publicationAmd. No. Date Text affectedBRITISH STANDARDBS EN 61191-6:2010EUROPEAN STANDARD EN 61191-6 NORME EUROPENNE EUROPISCHE NORM April 2010 CENELEC European Committee for Electrotechnical Standardization C

5、omit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Management Centre: Avenue Marnix 17, B - 1000 Brussels 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members. Ref. No. EN 61191-6:2010 E ICS 31.180

6、English version Printed board assemblies - Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA and measurement method (IEC 61191-6:2010) Ensembles de cartes imprimes - Partie 6: Critres dvaluation des vides dans les joints brass des botiers BGA et LGA et mthode de mesure (CEI 611

7、91-6:2010) Elektronikaufbauten auf Leiterplatten - Teil 6: Bewertungskriterien fr Hohlrume in Ltverbindungen von BGA und LGA und Messmethode (IEC 61191-6:2010) This European Standard was approved by CENELEC on 2010-04-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations

8、which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member. This Europ

9、ean Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions. CENELEC members are t

10、he national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Sloven

11、ia, Spain, Sweden, Switzerland and the United Kingdom. BS EN 61191-6:2010EN 61191-6:2010 - 2 - Foreword The text of document 91/897/FDIS, future edition 1 of IEC 61191-6, prepared by IEC TC 91, Electronics assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELE

12、C as EN 61191-6 on 2010-04-01. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CEN and CENELEC shall not be held responsible for identifying any or all such patent rights. The following dates were fixed: latest date by which the E

13、N has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2011-01-01 latest date by which the national standards conflicting with the EN have to be withdrawn (dow) 2013-04-01 Annex ZA has been added by CENELEC. _ Endorsement notice The text of

14、 the International Standard IEC 61191-6:2010 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following notes have to be added for the standards indicated: IEC 61190-1-3:2007 NOTE Harmonized as EN 61190-1-3:2007 (not modified). I

15、EC 61191-1 NOTE Harmonized as EN 61191-1 _ BS EN 61191-6:2010- 3 - EN 61191-6:2010 Annex ZA (normative) Normative references to international publications with their corresponding European publications The following referenced documents are indispensable for the application of this document. For dat

16、ed references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies. Publication Year

17、Title EN/HD Year IEC 60068-1 + A1 1988 1992 Environmental testing - Part 1: General and guidance EN 60068-11)-1994 - IEC 60194 2006 Printed board design, manufacture and assembly - Terms and definitions EN 60194 2006 1) EN 60068-1 includes A1 to IEC 60068-1 + corr. October . BS EN 61191-6:2010 2 611

18、91-6 IEC:2010 CONTENTS INTRODUCTION.6 1 Scope.7 2 Normative references .7 3 Terms and definitions .7 4 Voids in solder joints 8 4.1 General .8 4.2 Sources of voids8 4.3 Impact of voids9 4.4 Void detection .9 4.5 Void classification .9 5 Measurement .10 5.1 X-ray transmission equipment .10 5.2 Measur

19、ing environment .10 5.3 Measurement procedure10 5.4 Record of the measured value.11 5.5 Considerations on measurement .11 5.5.1 X-ray intensity for void detection11 5.5.2 Detection of real edge .11 5.5.3 Verification of measurement results.11 6 Void occupancy 11 6.1 Calculation of void occupancy .11

20、 6.2 Void occupancy for multiple voids14 7 Evaluation 14 7.1 Soldered joints to be evaluated .14 7.2 Evaluation of thermal life cycle decreased due to voids .14 7.3 Evaluation criteria for voids .15 Annex A (informative) Experimental results and simulation of voids and decrease of life due to therma

21、l stress.16 Annex B (informative) X-ray transmission equipment .20 Annex C (informative) Voids in BGA solder ball .22 Annex D (informative) Measurement using X-ray transmission imaging34 Bibliography38 Figure 1 Void occupancy13 Figure 2 Voids in a soldered joint.15 Figure A.1 BGA soldered joint, Sn-

22、Ag-Cu.17 Figure A.2 BGA soldered joint, Sn-Zn 17 Figure A.3 LGA soldered joint 18 Figure B.1 Construction of the equipment 20 Figure C.1 Small voids clustered in mass at the ball-to-land interface 26 Figure C.2 X-ray image of solder balls with voids.27 Figure C.3 Example of voided area at land and b

23、oard interface .27 Figure C.4 Voids in BGAs with crack started at corner lead31 BS EN 61191-6:201061191-6 IEC:2010 3 Figure D.1 X-ray transmission imaging.35 Figure D.2 X-ray transmission imaging of solder joint.36 Figure D.3 Typical X-ray transmission images of solder joint36 Table 1 Void classific

24、ation .9 Table 2 Examples of Cross-section of joint and void occupancy.14 Table A.1 Fatigue life reduced by voids in soldered joint of BGA17 Table A.2 Fatigue life reduced by voids in soldered joint of LGA 18 Table A.3 Voids evaluation criteria for soldered joints of BGA19 Table A.4 Voids evaluation

25、 criteria for soldered joints of LGA 19 Table C.1 Void classification27 Table C.2 Corrective action indicator for lands used with 1,5 mm, 1,27 mm or 1,0 mm pitch.28 Table C.3 Corrective action indicator for lands used with 0,8 mm, 0,65 mm or 0,5 mm pitch .30 Table C.4 Corrective action indicator for

26、 micro-via in-pad lands used with 0,5 mm, 0,4 mm or 0,3 mm pitch 32 Table C.5 Ball-to-void size image comparison for common ball contact diameters .33 Table C.6 C = 0 sampling plan (sample size for specific index value).33 BS EN 61191-6:2010 6 61191-6 IEC:2010 INTRODUCTION The necessity for the eval

27、uation of voids in soldered joints increases in the industry because the voids may affect the reliability of joints as the devices get smaller. As the number of interconnections increases the reliability per joint must also increase. This subject has been discussed in some countries and trade organi

28、zations, and specific proposals have been made for classification or evaluation of voids to develop process guidelines. The same subject is also studied in academia to find correlation between voids and reliability of a joint. Appreciable findings are now available from the reliability study includi

29、ng relation between shapes of voids and degradation of life due to voids in a joint in thermal cycle stress. Based on the information available, we developed evaluation criteria of voids in soldered joints for BGA (Ball Grid Array) and LGA (Land Grid Array) and a measurement method. BS EN 61191-6:20

30、1061191-6 IEC:2010 7 PRINTED BOARD ASSEMBLIES Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA and measurement method 1 Scope This part of IEC 61191 specifies the evaluation criteria for voids on the scale of the thermal cycle life, and the measurement method of voids using X-

31、ray observation. This part of IEC 61191 is applicable to the voids generated in the solder joints of BGA and LGA soldered on a board. This part of IEC 61191 is not applicable to the BGA package itself before it is assembled on a board. This standard is applicable also to devices having joints made b

32、y melt and re-solidification, such as flip chip devices and multi-chip modules, in addition to BGA and LGA. This standard is not applicable to joints with under-fill between a device and a board, or to solder joints within a device package. This standard is applicable to macrovoids of the sizes of f

33、rom 10 m to several hundred micrometres generated in a soldered joint, but is not applicable to smaller voids (typically, planar microvoids) with a size of smaller than 10 m in diameter. This standard is intended for evaluation purposes and is applicable to research studies, off-line production proc

34、ess control and reliability assessment of assembly 2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including

35、any amendments) applies. IEC 60068-1:1998, Environmental testing Part 1: General and guidance Amendment 1:1992 IEC 60194:2006, Printed board design, manufacture and assembly Terms and definitions 3 Terms and definitions For the purposes of this document, the terms and definitions given in IEC 60194

36、and the following apply. The terms and definitions for BGA and LGA have been added for the benefit of the reader, see also IEC 60194. 3.1 ball grid array BGA surface mount package wherein the bumps for terminations are formed in a grid on the bottom of a package IEC 60194, definition 34.1096 BS EN 6

37、1191-6:2010 8 61191-6 IEC:2010 3.2 land grid array LGA surface mount package with termination lands located in a grid pattern on the bottom of the package IEC 60194, definition 33.1891, modified 3.3 void occupancy ratio of the void cross-section area in a joint to the maximum cross-section area of t

38、he joint NOTE Practical calculation for a void evaluation is specified in 6.1. 3.4 macrovoid the most widely occurring voids in solder joints; these are caused by volatile compounds that evolve during the soldering processes, and they are typically larger than 10 m in diameter 3.5 planar microvoids

39、series of small voids located at the interface between the PCB (Printed Circuit Board) lands and the solder; they are caused by the surface condition of the board 4 Voids in solder joints 4.1 General A change in void size or frequency of voids may be an indication that the manufacturing parameters n

40、eed to be adjusted. Two reported causes of voids are trapped flux that has not had enough time to be released from the solder paste, and contaminants on improperly cleaned circuit boards. Voids appear as a lighter area inside the X-ray picture of solder joints and are usually found randomly througho

41、ut the package. 4.2 Sources of voids There can be voids in a BGA solder ball, in the solder joint to LSI (Large-Scale Integration) package interface, or in the solder joint to PCB interface. Various sources or reasons can be responsible for these voids. Voids can be carried over from original voids

42、in BGA solder balls, which could be the result of the ball manufacturing process. Voids can be induced into the reflowed solder joint by either the voids in the original component solder ball, or during the reflow attachment process. Voids can also form near the PCB interface during attachment. Thes

43、e voids are typically formed during the reflow soldering process by flux volatiles trapped during the solidification of the molten solder. The source of flux volatiles can be either from applied flux itself (typically rework), or flux which is one of the constituents of the solder paste used in the

44、reflow assembly process. In addition to voids formed from via-in-pad construction, some voids are detected in the middle to top (ball/device interface) of the reflowed solder joint. This is expected because the trapped air bubble and the vaporized flux, which is applied to the PCB lands, rises durin

45、g the reflow profile. This occurs when the applied solder paste and the BGAs collapsible solder balls melt together during the reflow profile. If the reflow profile cycle doesnt allow sufficient time for either the trapped air or vaporized flux to escape, a void is formed as the molten solder solidi

46、fies in the cool down area of the reflow profile. Therefore, the development of the reflow profile is extremely important as a contributor to the formation of voids. Voiding can also be a result of surface contamination at the component land or at the PCB land, inter-metallics forming between solder

47、 ball and land, or un-expelled flux residues from the assembly process. BS EN 61191-6:201061191-6 IEC:2010 9 4.3 Impact of voids How many and what size of voids should be allowable in the product before they impact the products required reliability? Voids may impact reliability by weakening the sold

48、er balls and reducing functionality because the reduced cross-section will have lower heat transfer and current carrying capabilities. Large voids are more detrimental but small pre-existing voids can merge during reflow to create larger voids. The elimination of voids, or at least a substantial red

49、uction, is generally preferred. 4.4 Void detection X-ray is required for the detection of voids in BGA and LGA solder joints. Higher cost equipment is based on X-ray tomography or laminography. Both types of these systems provide valuable techniques for void detection and location. X-ray systems tend to distort the size of voids depending on measuring conditions and the capability of the X-ray system used. It is possible to accu