NAVY MIL-M-85139-1979 MULTIPLEXER PULSE CODE MODULATION《脉冲编码调制的多路转接器》.pdf

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1、MIL -M- 8 51 39 ( AS) 19 September 1979 MILITARY SPECIFICATION MULTIPLEXER, PULSE-CODE MODULATION This specification is approved for use by Naval Air Systems Com- mand, Department of the Navy, and is available for use by all Departments and Agencies of the Department of Defense. 1. SCOPE. 1.1 Scope.

2、 This specification defines the performance and test requirements for a pulse-code modulation (PCM) multiplexer referred to herein as the multiplexer. 2. APPLICABLE DOCUMENTS. 2.1 Issues of documents. The following documents of the issue in effect (unless otherwise indicated) on date of invitation f

3、or bids or request for proposal form a part of this specification to the extent specified herein. SP E CI F I CAT I ONS MILITARY MIL -C-45662 Cal i bration System Requi rements. MIL -H -4 68 5 5 Human Engi neeri ng Requi rement s for Mi 1 i tary Systems, Equi pment and Facil ities. Beneficial commen

4、ts (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Commanding Officer, Naval Air Engineering Center, Engineering Specifications and Standards Department (ESSD) Code 93, Lakehurst, NJ 08733, by using the self-addres

5、sed Stan- dardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter. I FSC 5821 I ?WS DOCUMENT CONTAINS -E PAGES. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Procedures and Requi rements for Prepa

6、ration and Sol deri ng of El ectr ic al Connect ions . Sampling Procedures and Tables for Inspection by Attributes. Quality Assurance Terms and Def i nit ions . Marking for Shipment and Storage. Identification Marking of US Mi 1 i tary Property. Standards and Specifications, Order of Precedence for

7、the Selection of. Standard General Requirements for Electronic Equi pent. El ectranagnetic Interference Characteristics Requi rements for Equi went Electromagnetic Interference Characteristics, Measurement of. Environmental Test Methods. Environmental Test Methods. Human Engineering Design Criteria

8、for Mil itary Systems, Equi pent and Facil ities. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-85139( AS) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NIL-l-5G7 5 79770b 0373870 7 MIL-M-85

9、139 ( AS) varies with intended use, as does the output signaling rate, specified in the contract or purchase order (see 6.2.1). The multiplexer, as specified herein, meets all applicable requi rements of IR IG Document 106. 3.2 Characteristics. 3.2.1 Performance requi rements. The mu1 tiplexer shall

10、 meet the fol lowing performance requi rements when connected to input and power supply voltages asspecified herein, and produce both a fil tered and an un fil tered nonreturn-to-zero (NRZ) PCM bi tstream. The mu1 tiplexer shall meet al 1 appl icable requi rements of IRIG Document 106. 3.2.1.1 Input

11、 characteristics. The multiplexer shall accept both analog and digital inputs, in the numbers specified in the contract or purchase order (see 6,Z.l). 3.2.1.1.1 High level analog inputs. Unless otherwise specified in the contract or purchase order (see 6.2.1), high-level analog inputs shall accept i

12、nput voltages over the range from O to t5 volts direct current (Vdc). 3.2.1.1.1.1 Zero scale. Unless otherwise specified in the contract or purchase order (see 6.2.1), an input voltage of zero volt (V) shall produce an output within 2 bits of 0000001100 when the multiplexer is in a 10-bit output mod

13、e. 3.2.1.1.1.2 Full scale. Unless otherwise specified in the contract or purchase order (see 6.2,1), an input voltage of 5.000 Vdc shall produce an output within 2 bits of 1111110100 when the multiplexer is in a 10-bit output mode. 3.2.1.1.1.3 Input resistance. Input resistance shall be suf- ficient

14、ly high that a change in source impedance from O to 1 kilohm will not cause a conversion difference in excess of 2 parts in 1,024. 3,2.1.1.1.4 Back current. Back current shall not exceed 10 nanoamperes (nA) at -40 degrees Celsius (OC) (-40 degrees Fahrenheit (OF) ) nor 500 nA up to t8O“C (t176OF). 4

15、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.2.1.1.1.5 Out-of-band voltages. The multiplexer shall not be damaged nor other channels affected by an out-of-band voltage applied to any input or combination of at least three inputs over the range

16、of 130 Vdc. 3.2.1.1.1.6 Ground loop current, data ground. Inputs connected to data qround shall read as zero voltage inputs (OOOOOOllXX in a 10-bit mode), where X is a “O“ or a “1“: regardlesS.of voltages on other inputs (within limits of 3.2.1.1.1.5) or the difference in voltage between data ground

17、 and power ground (within the limits of 3.2.1.3.3). 3.2.1.1.2 Low-level analog inputs. Low-level analog inputs shall acceDt differential voltaqes over the ranqes specified in the contrakt or purchase order (see 6.2.1). - 3.2.1.1.2.1 Zero scale. The output code of the low-level analog inputs for mini

18、mum (most negative) input voltage shall be within 4 least significant bits (LSBs) of 0000001100 in a 10-bit mode. 3.2.1.1.2.2 Full scale. Output of the low-level analog inputs for most positive specified input voltage shall be within 4 LSBs of 1111110100 in a 10-bit mode. 3.2.1.1.2.3 Common-mode rej

19、ection. Common-mode rejection with respect to data ground shall be a minimum of 60 decibels (dB) from direct current to 60 hertz (Hz), and at least 40 dB from above 60 Hz to 1 ki lohertz. 3.2.1.1.2.4 Common-mode voltage range. Input common-mode voltage range shall be 110 Vdc with no degradation beyo

20、nd the levels specified in 3.2.1.1.2.3. 3.2.1.1.2.5 Input resistance. Input resistance shall he suf- ficiently high that a change in source impedance from O to 1 kilohm will not cause a conversion difference in excess of 4 bits in 1,024. 3.2.1.1.2.6 Back current. Back current shall not exceed 100 nA

21、 from either leg to signal ground nor 50 nA differentially in either polarity. 5 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL -M-85139 (AS) 3.2.1.1.2.7 Out-of-band voltages. Different al inputs shall not be damaged by input voltages of +10 Vdc

22、 and -5 Vdc applied dif- ferential ly. 3.2.1.1.2.8 Recovery time. Inputs shall recover from an out-of- band condition within 1 millisecond (ms) of the removal of such an input. This condition shall apply even when the out-of-band input is present at an unselected low-level analog input. 3.2.1.1.3 Di

23、screte in uts. Unless otherwise specified in the contract or purchase -_-_ET order see 6.2.1), digital inputs shall produce a “1“ at the output for a voltage greater than +2.2 Vdc at the input, and a “O“ for a voltage less than +1.2 Vdc at the input. Speci fi ed switching threshold if different from

24、 the above shall be within the limits of +1 to +9 V, with a band of uncertainty not less than 1 V. 3.2.1.1.3.1 Input impedance. Input resistance shall be no less than 10 kilohms referred to threshold voltage, shunted by no more than 100 picofarads (pF). 3.2.1.1.3.2 Back current. Back current referre

25、d to ground or threshold voltage shall not exceed 1 microampere (PA) in either polarity. 3.2.1.1.3.3 Out-of-band voltages. The digital input channels shall operate normally with input voltages between the ranges of t30 Vdc. 3.2.1.1.3.4 Throughput delay. Response of the output to a change of state at

26、 the input shall be correct for input changes as recent as 2 microseconds (us) prior to selection of that channel. 3.2.1.2 Data transfer characteristics. The mu1 tiplexer shall contain the appropriate amplifi ers and anal og-to-digital converters to produce the desired digital output signals. 3.2.1.

27、2.1 Conversion accuracy. Conversion accuracy for a high-level analog input shall be within 0.2 percent k0.5 LSB for any combi nation of noi se, crosstalk , channel scatter, and drift for all inputs of 1 kilohm source impedance or less at all environmental temperatures. Conversion accuracy for al 1 l

28、ow-level analog inputs shall be within 0.4 percent 10.5 LSB under the same conditions. 6 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-85139( AS) 3.2.1.2.2 Resolution. Unless otherwise specified in the contract or purchase order (see 6.2.1),

29、resolution of the analog-to-digital conversion shall be 10 bits (1 part in 1,024). 3.2.1.2.3 Conversion speed. Unless otherwise specified in the contract or purchase order (see 6.2.1), convers ion speed shall be 666 nanoseconds (ns) or less for the most significant di it and 10 ps or less for the le

30、ast significant digit (1 part in.218). 3.2.1.2.4 Linearity. Linearity shall be within 1 bit in a 10-bi t convers ion. 3.2.1.2.5 Monotonicity. All conversions shall be monotonic. 3.2.1.3 Power. ope 3 sha 3 3.2.1.3.1 Operating voltage range. The multiplexer shall ,ate on 28 i6 Vdc. 2.1.3.2 Isolation.

31、Power supply positive and return lines 1 be isolated from data ground by a minimum of 1 megohm. 2.1.3.3 Differential voltage. The multiplexer shall operate within tolerances with voltage differentials up to and including 140 Vdc between data ground and either power supply lead. 3.2.1.3.4 Curre,ot dr

32、ain. Un1 ess otherwise specified in the contract or purchase order (see 6.2.1), the multiplexer shall not draw more than 350 milliamperes (mA) from primary power. 3.2.1.3.5 Overvoltage. The multiplexer shall not be damaged by a power supply voltage of +40 Vdc for a period of 1 minute. 3.2.1.3.6 Powe

33、r reversal. The by supply voltage of improper PO 3.2.1.4 Timing ci rcui ts. 3.2.1.4.1 Internal clock. The with an internal clock of freque multiplexer shall not be damaged arity for an infinite period. multiplexer shall be provided CY specified in the contract or purchase order (see 6.2.1). The clck

34、output shall be available exclusively at the input .connector and shai i operate the multiplexer only upon connection to the clock input circuit. This clock signal may be at a multiple of the output signal. 7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

35、HS-,-,-3.2.1.4.2 Clock format. The clock signal shall be a transistor-transistor-1 ogi c (TTL) or a canpl imentary metal - oxide-semiconductor (CMOS) signal driven from an internal t5-Vdc supply referenced to data ground. 3.2.1.4.3 Clock load. The clock shall continue to operate when loaded by an ex

36、ternal load of 1.5 kilohms connected to ground or the +5-Vdc supply. 3.2.1.4.4 External clock . The multiplexer shall be capable of being driven by an external TTL or appropriately buffered +5-Vdc CMOS signal at rates from zero to the limit specified in 3.2.1.4.1. 3.2.1.4.5 External clock loading. T

37、he load seen by an external clock signal shall not exceed 3 ki lohms to ground or the t5-Vdc supply 3.2.1.4.6 Clock buffer. When specified in the contract or purchase order (see 6.2.1), the multiplexer shall provide a clock buffer circuit which isolates an incoming clock signal, buffers the clock si

38、gnal through a minimum of four Schottky-clamped TTL inverters, and feeds the resulting buffered clock signal into the normal clock input terminal of the multiplexer through an internal connection. Additionally, the clock buffer shall provide a similarly buffered signal at a separate coaxial connecto

39、r for driving external equipment. Each string of inverters shall be powered by a separate power supply regulated separately from the mu1 tiplexers other internal suppl ies and from each other. Unless otherwise specified, the output of the delayed signal at the coax- ial connector shall rise between

40、30 and 80 ns following onset of output data. 3.2.1.5 Output characteristics. The multiplexer shall provide a TTL-compatible NRZL output consisting of a serial digital representation of the analog inputs, most-significant bit first; the digital inputs; a synchronization word; and, when specified in t

41、he contract or purchase order (see 6.2.1), a single parity bit at the end of each data word so the number of “1s“ in each word will always be odd in accordance with the program directed by the PROM described in 3.2.1.7. 3.2.1.5.1 Output load. The TTL output shall operate normally into a 3-kilohm loa

42、d connected to data ground or to +5 Vdc. 8 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL -M -8 51 39 ( AS) 3.2.1.5.2 Output short-circuit protection. The TTL output shall not be damaged by a continuous short circuit. 3.2.1.6 Filtered out ut. Wh

43、en specified in the contract or Purchase order + see 6.2.1) a second output shall be provided, bonsisting of a2-volt peak-to-peak (V 1 ) (4 Vp-p open circuit) signal identical to the TTL output desgrybed in 3.2.1.5 but passed through a filter at the frequency specified in 3.2.1.4.1 with a constant d

44、el ay (1 inear phase) characteristic and a minimum rol loff of 36 dB per octave in accordance with IRIG Document 106. output shall be 75 ohms at the defined clock rate. programmable by interchange of a PROM. The type and nmber of devices used for the PROM is not fixed, but the PROM shall control the

45、 content and length of the synchronization word, subframe routines, the order in which the inputs are read, the number of bits per analog input (all words shall be of the same length), and the frame length. The PROM may, at the contractors option, control other features not specified herein. When sp

46、ecified in the contract or purchase order,instructions for programming of the PROM shall be supplied with the multiplexer (see 6.2.2). Field replacement of the PROM shall be accomplished without soldering. 3.2.1.7.1 Subcommutation capabil ity. The multiplexer shall be programmable by the PROM to per

47、mit subcanmutation of 2, 4, 8, or 16 analog signals or digital words in a single major frame. Subframe identification shall be programmable. 3.2.1.7.2 Synchron i zat ion word 1 ength . The sync hroni zat ion word shall be programable both in content and length from a minimum of one to a maximum of t

48、hree words. 3.2.1.6.1 Output impedance. Output impedance of the filtered 3.2.1.7 Programmability. The multiplexer shall be field- 3.2.1.8 Self-start. The multiplexer shall canmence operation within the limits described herein within 100 ms of the applica- tion of power and without external triggerin

49、g at any combination of power supply voltage, input conditions, and environmental conditions within the limits required by this specification. Additionally, the mu1 tip1 exer shall cunrnence operation fol lowing a 2-hour soak, with power removed, at temperatures down to the minimum storage temperature (see 3.2.5.2). Operation need not be wit hin prescribed 1 imit s between minimum storage and operat ion tempe ratur e.