JEDEC JEP152-2007 DDR2 DIMM Clock Skew Measurement Procedure Using A Clock Reference Board《使用时钟基准板的DDR2 DIMM时钟歪斜测试程序》.pdf
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1、JEDEC SOLID STATE TECHNOLOGY ASSOCIATIONJEP152MAY 2007JEDECPUBLICATIONDDR2 DIMM Clock SkewMeasurement Procedure Using AClock Reference BoardNOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approvedthrough the JEDEC Board of Directors level and subsequent
2、ly reviewed and approved by the JEDECLegal Counsel. JEDEC standards and publications are designed to serve the public interest through eliminatingmisunderstandings between manufacturers and purchasers, facilitating interchangeability andimprovement of products, and assisting the purchaser in selecti
3、ng and obtaining with minimum delaythe proper product for use by those other than JEDEC members, whether the standard is to be usedeither domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption mayinvolve patents or articles, mate
4、rials, or processes. By such action JEDEC does not assume anyliability to any patent owner, nor does it assume any obligation whatever to parties adopting theJEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specifica
5、tion and application, principally from the solid state device manufacturer viewpoint. No claims to be in conformance with this standard may be made unless all requirements stated in thestandard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publicatio
6、nshould be addressed to JEDEC Solid State Technology Association, 2500 Wilson Boulevard,Arlington, VA 22201-3834, (703)907-7559 or www.jedec.org. Published by JEDEC Solid State Technology Association 2007 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge,
7、however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. Price: Please refer to the current Catalog of JEDEC Engineering Standards and Publications At www.jedec.org Printed in the U.S.A. All rights reserv
8、ed PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by the JEDEC Solid State Technology Association and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact:
9、 JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, Virginia 22201-3834 or call (703) 907-7559 JEDEC Publication No. 152-i-DDR2 DIMM Clock Skew Measurement Procedure Using a Clock Reference BoardContents1 Scope.12 Differential vs. Single-ended probing.13 Measurement of skew, j
10、itter and slew rate using differential probes23.1 Test Equipment and setup .23.2 Preparation .33.3 Data aquisition 43.4 Skew .43.5 Jitter 63.6 Slew rate.74 Measurement of skew, jitter, slew rate and crosspoint voltage using single-ended probes94.1 Test equipment and setup.94.2 Preparation .104.3 Dat
11、a aquisition 114.4 Skew .124.5 Jitter 134.6 Slew rate.134.7 Crosspoint voltage 13Annex A Measuring Equipment Jitter14Annex B Overscaling 16Annex C Correlation bewteen equipment/instrument jitter, observed jitter and true jitter 17Annex D Correlating Clock Reference Boards and Normalized Skew19Annex
12、E Differences betwee revisions .21JEDEC Publication No. 152-ii-JEDEC Publication No. 152Page 1DDR2 DIMM Clock Skew Measurement Procedure Using a Clock Reference Board(From JEDEC Board Ballot, JCB-04-84A, Formulated under the cognizance of theJC-45.1 Subcommittee on RDIMM.)1ScopeThis document is the
13、work product of the JC-45.1 “DDR2 DIMM Clock Skew Measurement” task group.The purpose of this document is to define procedures to measure clock parameters on registered DIMMs using the DDR2 Clock Reference Board. It is NOT the intent of this document to set specification values or validation require
14、ments. 2 Differential vs. Single-ended probingThis document describes measurements with both single-ended and differential probes. There are several pros and cons of each method: hard to calibrate and keep calibrated four probes at once. more chances for human error with four probes. roughly half th
15、e effort with four single-ended probes if Vix measurement is required differential probes are perceived to be more accurate especially when close-by GND contact for the single ended probes is not availible. single ended jitter measurements can be more accurate than those with differential probes, es
16、pecially if the bandwidth of the single ended probes is higher. JEDEC Publication No. 152Page 23 Measurement of skew, jitter and slew rate using differential probes3.1 Test equipment and setup Oscilloscope with minimum bandwidth of 3 GHz and 8 Gigasamples/s, Two differential probes with minimum band
17、width of 3 GHz, resulting in a probe tip bandwidth of no less than 2.5 GHz PC2-3200/4300 JEDEC CRB Clock Reference Board (=CRB) by CST, DC Power Supply for 3.3 V to CRBFigure 1 Measurement setup with differential probesScopeChDiff. ProbesCLK SynthesizerCLK BufferSwitchDRAM Reg.PLLDIMMDRAMDRAMDRAMDRA
18、MDRAMDRAMDRAMDRAMCLK Ref. NetsVddDRAM Reg.DRAMDRAMDRAMDRAMDRAMDRAMDRAMDRAMJEDEC Publication No. 152Page 33 Measurement of skew, jitter and slew rate using differential probes (contd)3.2 Preparation1) Allow instruments to warm up ( 20 min),2) Disconnect all probes from the scope,3) Perform the scope
19、calibration,4) Attach differential probes 1 a flight time of 50 ps per 12 mm is a reasonable estimate for the required correction. The deltas need to be determined from the net topology and may be obtained from the DIMM design specification of the DIMM under test.tD-tX-CH2VTH()tX-CH1VTH()=tsk(LH)1N-
20、tD+N=tsk(HL)1N-tD-N=JEDEC Publication No. 152Page 63 Measurement of skew, jitter and slew rate using differential probes (contd)3.5 Jitter1) Obtain by non-linear interpolation, the positive going time of threshold (Vth = 0 V) crossing for the recorded CH2 signal. Do this by first finding the pair of
21、 points on an upward slope straddling Vth = 0 V, and then interpolating the time at which the line is estimated to intersect the threshold (same as step 1 in 3.4). Record each of these values as T+n.2) In a fashion nearly identical to step 1, obtain by nonlinear interpolation, the next negative goin
22、g time of threshold crossing the recorded CH2 signal. Thus a single value for T-nis given by the time of downward crossing of CH2Vth for the nth time (same as step 3 in 3.4).3) Repeat steps 1 and 2, for the remaining threshold crossings in the recorded signals, thus obtaining two arrays of values T+
23、nand T-n(for n = 1 to N) where N is the total number of clock cycles in acquired CH2 recorded signal, and is about 10,000.4) Two other arrays of half-period values are obtained from the T+nand Tn-values by forming the difference between adjacent T+nand T-n, thus HP+n=T+n T-nand HPn-=T-n T+n+1. See F
24、igure 2.Figure 2 Graphic relationship between T+-n, HP+-nand P+-nTn+Tn+1+Tn-Tn+1-Tn+2+Pn+HPn+ HPn+1+HPn-HPn+1-Pn+1+Pn-VthJEDEC Publication No. 152Page 73 Measurement of skew, jitter and slew rate using differential probes (contd)3.5 Jitter (contd)5) Yet one more array of period values is obtained fr
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