ECA CB 5-1-1971 Recommended Test Procedure for Semiconductor Thermal Dissipating Devices (Addendum to Bulletin No 5 (STABILIZED))《半导体热驱散设备的推荐测试程序 CB5的附录》.pdf

《ECA CB 5-1-1971 Recommended Test Procedure for Semiconductor Thermal Dissipating Devices (Addendum to Bulletin No 5 (STABILIZED))《半导体热驱散设备的推荐测试程序 CB5的附录》.pdf》由会员分享，可在线阅读，更多相关《ECA CB 5-1-1971 Recommended Test Procedure for Semiconductor Thermal Dissipating Devices (Addendum to Bulletin No 5 (STABILIZED))《半导体热驱散设备的推荐测试程序 CB5的附录》.pdf（14页珍藏版）》请在麦多课文档分享上搜索。

1、 EIA STANDARD Recommended Test Procedure for Semiconductor Thermal Dissipating Devices CB-5-1 (Addendum to Bulletin No.5) May 1971 Stabilized: January 2014 CB-5-1CB-5-1-1971 Approved: May 1971 NOTICE EIA Engineering Standards and Publications are designed to serve the public interest through elimina

2、ting misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in an

3、y respect preclude any member or nonmember of ECIA from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than ECIA members, whether the standard is to be used ei

4、ther domestically or internationally. Standards and Publications are adopted by ECIA in accordance with the American National Standards Institute (ANSI) patent policy. By such action, ECIA does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopti

5、ng the Standard or Publication. This EIA Standard is considered to have International Standardization implication, but the International Electrotechnical Commission activity has not progressed to the point where a valid comparison between the EIA Standard and the IEC document can be made. This Stand

6、ard does not purport to address all safety problems associated with its use or all applicable regulatory requirements. It is the responsibility of the user of this Standard to establish appropriate safety and health practices and to determine the applicability of regulatory limitations before its us

7、e. (From Standards Proposal No. 5236.16, formulated under the cognizance of the CE-2.0 Committee on EIA National Connector and Socket Standards). Published by Electronic Components Industry Association 2014 Engineering Department 2214 Rock Hill Road, Suite 170 Herndon, VA 20170 EIA CBS-1 71 3234600

8、0000240 7 = SUPPLEMENT TO COMPONENTS BULLETIN NO. 5 RECOMMENDED TEST PROCEDURE FOR THERMAL DISSTPATING DEVICES SCOPE 7 The scope of this supplement to EU Components Bulletin No. 5 is to prwent methods of instrumentation for plastic case semiconductors and integrated circuits for evaluation of therma

9、l dissipating devices. DISCUSSION The need for this addendum arises from the increasing use of “plastic“ of devices with metal studs or flanges only. economy“ type devices. Components Bulletin No. 5 as it now exists, discusses II The procedures and methods described in this supplement have been deve

10、loped for and used in “laboratory“ testing of heat dissipating components. Where correlation between laboratory data and systems evaluation is deaired, addi- tional instrumentation is required. The exact location of the additional thermo- couples or other sensors depends on the type of heat dissipat

11、or under test. “herefore, instrumentation other than that recommended for laboratory con- ditions are not specified. It is proposed that the “case“ temperature measuring thermocouple no longer be attached to the case or outside shell of the device, as instrumented on the metal case semiconductorsc .

12、Instead, it is proposed that it be attached to the metal substrate upon which the semiconductor chip is mounted. The use of the metal chip supporting member as the location for the measuring thermocouple was selected for several reasons. The plastic material commonly used as the encapsulant has, gen

13、erally, a very low thermal conductivity. fierefore, the ability of the heat to reach all areas of their transistor case is greatly reduced. To specify any location on the case as representative of the actual junction temperature under operation is misleading at best. Investigation into the area of p

14、lastic semiconductor construction determined that most units have a metal platform on which the dice or chip is secured. The platform or dice pad is located where it is comparatively easy to attach a thermocouple to it without disturbing the chip. Mounting the thermocouple as close as possible to th

15、e chip insures optimum accuracy. The size relation between the chip and its pad is usually not greater than four of five to one. approximate junction temperature. temperature and the metal pad temperature is a function of the thenual re- sistance (e) of the bonding technique used. the order of lC pe

16、r watt or less. Measuring the temperature of this area indicates an The difference between actual junction In many instances, this is on Obtaining a temperature closer to the chip allows a more accurate indication of the effect that a heat dissipator/sink has upon the semiconductor junction temperat

17、ure. Xn this manner, a majority of the guesswork involving conduction e PROBLEM HARD COPY - . _. e path grad-ienes is eliminated. repeatable, and accurate temperature measuring point to get accurate data on the effect8 of a diesipator. in syetem $herma1 evaluation, it is sometimes necessary to mouat

18、 the caae:. thermocouple to an easily accessible point, i,e,on a flange mounted device, unqer the-screw head, .- “ This procedure provides an easily obtain-ed, A qase temperature comparison may be made by performgng an dd$tional .test on:a similar device mounting themcouples in both places (under th

19、e Scre, , head and close to the chip) to obtain correlation. devices, thermocouple8 should be attached to other places But, for non-flange mounted collector lead, or-to the platform close to the chip. With theee pointe in mind, the following io then proposed - 5. addendum to EU Component Bulletin No

20、. euch as the-tab, aa a euppiemeit/ % * -2- PROBLEM HARO COPY EIA CBS-L 71 3234600 O000242 2 It ie proposed that the following paragraph and figures be added to EU CoPiponents Bulletin No. 5. niques for plastic case transistors and integrated circuits o The purpose is to describe instrumentation tch

21、- 1, GENERAL DISCOSSION Relative information: Componente Bulletin No. 5 are considered applicable to this Supplement. The following information is for laboratory tests only. System thermal evaluations must be correlated to these procedures by additional specific case temperature measurements. using

22、infrared equipment or thermocouples meaguring the case surface tampe- rature in a simulation of the system configurdtion. used as correlation to identical measurements 1 on actual equipment. Paragraph 1.1 through 6 and 8.lthrough 10.3 of EU This temperamre data should be obtained This data can be th

23、en 2. CASE CONFIGURATION The plastic transistor can generally be classified into separate groups of similar case configuration. structure for leads and chips. mounting locations for the principle thermocouple. attached as close as possible to the semiconductor chip or hot-spot. 2.1 Non-metallic Caae

24、 Tvpe Each has its own shape, yet each has a supporting It is this structure which is used to obtain This thermocouple is LI 2.1.1 Plastic Case Type Figures 1, 2 and 7 show the locations of the holes for these configurations. Any appropriate method of attaching a thermocouple may be used. of the dev

25、ice surfaces is to be used as a conduction plane, it must be kept free of thermocouple wires. This may be accomplished as shown in Figure 3 by inserthg them in a smell groove, cementing them in place with a suitable ewxy and sanding the epoxy to conform to the-original sur face . 2.1.2 Ceramic Cases

26、 Where the!case is of a material that is too hard for drilling without special equipment or a non-conductive material to prohibit welding, a banding technique must be used. If one of the device surfaces is to be used as a conduction plane, it mst be kept free of thermocouple wires. If one I This is

27、shown in Figure 5. t 3. CLEARING THERMDCPLE LEADS FROM TEST SPECIMENS 3.1 Diesipatore When mounting the thermocouple to the chip pad, it may become necessary to route the leads between the dissipator and the semiconductor. disaipator should be relieved to allow the themcouple leads to pass. Whenever

28、 possible the .- . PROBLEN HARD COPY EIA CB.5-1 71 3234bOO 06300243 4 W s when this would redwe the effectiveness of the dissipators mechanical - function. _. case. . _ The relief should be then considered on the semicopductor _. . -E I. With semiconductors care should.be taken: tp insure that the a

29、rea of thermal flow from. transistor to dissipator is not impaired. should beconsidered if either af these cannot be used. Alternate instrumentation 4. HIGH POWits mounting substrate or .frame. and electrically welded to the frame, The thermocouple lead or leads are then placed down the hole The hol

30、e is then sealed with a EIA CB5-1 71 m 3234bUO U800244 b m o 0 a suitable epoxy resin to sea overlayed to act as strain relief. , .* a larger amount is then This is indicated on Figure 5. 6.2 Diesipator Any method described in Paragraphe 7.1 to 7.4 of EIA Components Bulletin No. 5 may be used. PROBL

31、EM HARD COPY I b i ; EIA CB5-L 71 m 3234600 0000245 A m I: _. i %i I O - “ FXGURE 1 -6 PROBLEM HARD COPY EIA CES-L 71 m 3234600 0000246 T m ALTERNATE THOMOCOUPILE WIRE FIGURE 2 EIA CBS-I 71 3234b00 0000247 I . . .i . .- . . . i . . -I . . . 2,s . - . I & . . . .i_ . . . . .-. .- .- -. . . .,. : . , . .i. . FIGURE 3 ,- EIA CES-L 71 3234600 O000248 3 FIGURE 4 -9- - . . -. EIA CBS-L 7L 3234b00 0000249 5 -. DEVICE . i -IwEmE WIRE EIA CB5-L 7% m 3234600 0000250 L m FIGURE 6 - 11 - -DEVICE EIA CBS-L 71 3234600 0000251 3 m /-LEAOS THERMOCOUPLE /-WIRE DEVICE- ALTERNATE THERMOCOUPL FIGURE 7