DLA SMD-5962-92157 REV A-1996 MICROCIRCUIT DIGITAL FAST CMOS BUFFER CLOCK DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《硅单块 晶体管-晶体管逻辑电路兼容输入 带三态输出的缓冲器或钟驱动.pdf

《DLA SMD-5962-92157 REV A-1996 MICROCIRCUIT DIGITAL FAST CMOS BUFFER CLOCK DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《硅单块 晶体管-晶体管逻辑电路兼容输入 带三态输出的缓冲器或钟驱动.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-92157 REV A-1996 MICROCIRCUIT DIGITAL FAST CMOS BUFFER CLOCK DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《硅单块 晶体管-晶体管逻辑电路兼容输入 带三态输出的缓冲器或钟驱动.pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、NOTICE OF REVISION (NOR) HIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. 1. DATE (WMMDD) FwmAppnwed 96-06-07 OMB No. 0704-0i88 I I I TITLE OF DOCUMENT 11. ECPNO. MICROCIRCUIT, DIGITAL. FAST CMOS, BUFFEWCLOCK DRIVER WITH 10. REVISION LETER iic,no,tocihisisosuarapehawspa,indu

2、dlng.timefaislniciau searrhlng exianng data mms wdIhs6.nesdad andcanpieandnlealnedMndhr seod amnnb? W,rdll hS burdm SUma*r CU bny Othd ucdiation inlomiabai , xl$i%astions raducing his add I1Aa1. Revisions description colum; add Vhanges in accordance uith NOR 5962-R143-96“. Revisions date colum; add

3、8196-06-078t. Revision level block; add “A11. Rev status of sheets; for sheets 1, 10, and 12, add iiAm8. Sheet 10: Table I, propagation delay time, IN to OAn, INE to OEn, INB to MON, t from “7.5 ns“ to “6.3 nsii $or device type O1 and from 186.8 nseHko “6.0 nsl for device type 02. Table I, propagati

4、on delay time, IN to , INE to , INg to MON, t from “7.5 ns8# to %.3 ns“ ?or device type 03 and from %.8 ns“ toPnb.O ns“ or device type 04. Revision level block; add 81Af1. Figure 1, terminal nunber 8; change terminal symbols from iiGNDp18 to 1tNC84, where NC stands for no connection, Revision level

5、block: add “A88. and tpLH; change RiaXimm Limits and tp “; change maximm limits Sheet 12: for device types 01, 02, 03, and 04 (two places). 6. NOR NO. 5962-R143-96 8. DOCUMENT NO. 5962-921 57 14. THIS SECTION FOR GOVERNMENT USE ONLY THREE-STATE OUTPUTS. lTL COMPATIBLE INPUTS, MONOLITHIC SILICON NA b

6、. NEW a, CURRENT Initial A a. (X one) X (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be received before manufacturer may Incorporate this change. (3) Custodian of master document shall make above revision and furnish revised document. b. ACTIVIT

7、Y AUTHORIZED TO APPROVE CHANGE FOR GOVERNMENT DESC-ELDC c. TYPED NAME (First, Middle initiai, Last) Monica L. Poelking d. TITLE Chief, Custom Microelectronics 15a. ACTIVITY ACCOMPLISHING REVISION DESC-ELDC e. SIGNATURE f. DATE SIGNED (WMMDD) Monica L. Poelking 96-06-07 b. REVISION COMPLETED (Signatu

8、re) c. DATE SIGNED (YYMMODJ Thanh V. Nguyen 96-06-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-LTR SHEET SHEET DESCRI PT ION DATE (YR-Hoa) APPROVED REV STATUS OF SHEETS PMIC NIA THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES

9、OF THE DEPARTMENT OF DEFENSE AHSC W/A 18 19 20 21 SHEET Wanda L. Meadows PREPARED BY CHECKED BY Thms J. Ricciuti APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 93-04-16 REVISION LEVEL DEFENSE ELECTRONCS SOPPLY CENT= DAYTON, OHIO 45444 MICROCIRCUITS, DIGITAL, FAST CMOS, BUFFER/CLOCK DRIVER WITH

10、 THREE-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC SILICON SIZE ICAGE CODE I A 67268 5962-92157 SHEET 1 OF 21 - JUL 91 5962-EM-93 DISTRIBUTION STATEMENT A. Approved for public release; distribution is un1 imited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

11、 IHS-,-,-1. SCOPE 1.1 a. This drawing forms a part of a one part - one part niUnber documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes 8, Q, and M) and space application (device classes S and V), and a choice of case outlines

12、and lead finishes are available and ar6 reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class 8 microcircuits in accortknce with 1.2.1 of MIL-Sl-883, “Provisions for the use of MIL-STO-883 in conjunction with compliant non-JCVI devices“. When availab

13、le, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. I 1.2 m. The PIN shall be as shown in the following exanple: STANDRIZED MILITARY JnuuING DEFENSE ELECTRONCS SUPPLY CENTER DAnON, OHIO 45444 5j62 i 92157 I J4, f 1 Federa 1 RHA Dev ce Devi ce vcc s 5.5 v Max For all i

14、nputs affecting output under test Al 1 V - V - ForLbll other inputs VIN = Vcc or GND 10“ = -32 OH2 For all inputs affecting output under test Al 1 4.30 VIN = V or VIL = 0.8 v Fork11 other inputs iIH 2fl v V - V or GNO IOHI! -306 /JA OH3 For all inputs affecting output under test Al 1 4.5 v - 4.5 v -

15、 3.0 V - 3.60 VIN = V or VIL = 0.8 V ForIk11 other inputs VIH 2! v = Vcc or GND IOHI! -12 mA “OH4 For all inputs affecting outout under test Al 1 2.40 = Vcc or GND IDHI! -24 mA JOL 1 For all inputs affecting output under test Al 1 1,2.3 0.20 VIN = V or VLc ForLhl other inputs = 2% v VHC - 0.2 v VIN

16、- vCc or GND IoL 300 /JA Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-72157 = 9933996 004099b OTb M Test and I Synbol MIL-STD-883 test I method iJ Cow level output I VOL2 vo 1 tage TABLE I. Electrical performance characteristics - Continu

17、ed. I Test conditions unless Devi ce otherwise specified 2/ I type 3J -55C S TC S +125OC and device 4.5 v S vcc 5 5.5 v class For all inputs affecting Al 1 output under test I I - = V or GND I vo:;= GNGC I Negative input I VIc- For input under test clamp voltage -18 nd IIN 3022 Input current high I

18、IIH For input under test Al 1 Al 1 3010 Input current low 3009 v -v VIN = Vcc or GND I Fort11 oiker inputs I IIL For input under test Al 1 I Forl!ll other inputs I V GND VIN - Vcc or GND 5.5 V I 1.2.3 I -5.0 pA STANDARDIZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444

19、 5962-92157 REVISION LEVEL SHEET 7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-72157 = 9999996 0040997 T32 = snd device I I c 1 ass 14/ Test and I Symbol MIL-STD-883 test I method I/ Min Max l Input capacitance CIN i 3012 Al 1 GND I 4 ou

20、tput capacitance 3012 I 12 I PF I All I 5.5 V I 1.2.3 I Short circuit output current 3005 lu Quiescent supply current, outputs 1 ow 3005 Quiescent supply f AIcc current del ta, TTL input levels I s/ 3005 IccL I Quiescent supply 1 ICCH current, outputs high 3005 I STANDARDIZED MILITARY DRAWING DEFENS

21、E ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-92157 A REVISION LEVEL SHEET 8 Quiescent supply 1 Iccz current, outputs i three-state 3005 I Dynarni c power I ICCD supply current YY TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Test conditions u

22、nless otherwise specified 2/ -55OC S TC S +125“C- 4.5 v s vcc s 5.5 v See 4.4.lb TC - +25OC See 4.4.lb TC +25“C For all inputs V - V or GND vou:N- GNF For input under test - 2.1 v Fob; :!li er inouts VIN = vCC or GND - OE , B - GND Fo! all other inputs VIN - Vcc or GND - OE . B - V Fot al 1 otheFinp

23、uts - OEA, B - GND For all other inouts VIN - i/ or GND Per output switching 50% duty cycle Outputs open Device I I Group A I I Unit Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-92L57 = 999999b 0040998 979 TABLE I. Electrical performance

24、characteristics - Continued. Test conditions unless Test and I Sybol I otherwise specified 2/ MIL-STD-883 test I I -55C TC S +125C method 1/ 4.5 v s vcc s 5.5 v Total power supply I IC Outputs open 1 VIN f - io MHz I VIN 1 ;y 1 4.5 v I 9,10,11 I 01.02 1 4.5 v I 9.10.11 I All I/ For tests not listed

25、in the referenced MIL-STD-883 (e.g. AI conditions listed herein. All inputs and outputs shall be sing the alt ernate test method the maxinum limit is equal to the nimber of inputs at a high TTL input level times 2.0 mA, and the preferred method and limits are guaranteed. This test may also be perfor

26、med by testing one input per device and guaranteeing all other inputs of the device to the preferred method. ICCD may be verified by the following equation: ICCD where I device %dCt high inputs - 2.4 V and low inputs - 0.4 V. The input voltage levels have the allowable tolerances per MIL-STD-883 alr

27、eady incorporated. This parameter is guaranteed but not tested. Skew parameters apply to propagation delays only. These limits are guaranteed if not tested at Vcc - 5.5 V. For skew times, m - 1 to 5 and n - 1 to 5. t value of the difference between output transitions in the same direction (low-to-hi

28、gh, fi! 1 d * - T ST RL RL -L - NOTES: When measuring tpHZ and tpZH: Vtest - open. When measuring tpLZ and tpZL: Vtest - +7.0 V. When measuring tpLH and tpHL: V est = open. a?VzZ!5xcept when disabled by the output enable control. The t under test with internal conditions such that the output is at V

29、:“exceptP%en disabled by the output enable control. CL = 50 pF minimim or equivalent (includes probe and jig capacitance). RL - 500 R or equivalent. RT = 50 a or equivalent. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR S 10 MHz; tr S 2.5 ns: tf S 2.5 ns: duty Cycle = 50% Timing param

30、eters shall be tested at a minimum input frequency of 1 MHz. The outputs are measured one at a time with one transition per measurement. and tp reference wave!orm is for the output under test with Internal conditions such that the output Is and t reference waveform is for the output FIGURE 4. Switch

31、inq waveforms and test circuit. STMDAlUIZED 5962-92157 MILITARY DRAWING DEFKNSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPL

32、Y CENTER DAYTON. OHIO 45444 SIZE 5962-92157 A REVISION LEVEL SHEET 14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I y;. Jljk DATA I NPUT 1.5v 0.3V 0.ov -t f 3.0V 2.7V 1.5v 0.3V J / VOL + 0.3v VOL NON I NVERT I NG OUTPUT OH VOH - 0.3V 1. sv 0.0v -

33、tPLH 7 -t PHL - -t PLH STANDADIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTEB DAYTON, OHIO 45444 SIZE 5962-92157 A REVISION LEVEL SHEET 15 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-92L57 = 9999996 0041005 707 STANDARDIZED MILIT

34、ARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER 4. QUALITY ASSURANCE PROVISIONS 4.1 Sanplinq and inspection. For device class M, sampling and inspection procedures shall be in accordance with section 4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). For device class B, sampling

35、 and inspection procedures shall be in accordance with MIL-M-38510 and method 5005 of MIL-STD-883, except as modified herein. For device class S, sampling and inspection procedures shall be in accordance with MIL-M-38510, and methods 5005 and 5007 of MIL-STD-883, except as modified herein. For devic

36、e classes Q and V, sampling and inspection procedures shall be in accordance with MIL-1-38535 and the device manufacturers QM plan. constructed so that the devices are stressed at the maximum operating conditions stated in 4.2.1a5 or 4.2.1a6 as applicable, or equivalent as approved by the qualifying

37、 activity. 4.2 Screeninq. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. For device classes B and S, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be co

38、nducted on all devices prior to qualification and quality confomnce inspection. For device classes Q and V, screening shall be in accordance with MIL-1-38535, and shall be conducted on all devices prior to qual if ication and technology conformance inspection. 4.1.1 Burn-in and life test circuits. F

39、or device classes B and S, the burn-in and life test circuits shall be 4.2.1 Additional criteria for device classes M, B, and S. a. Burn-in test, method 1015 of MIL-STO-883. (1) Test condition A, E, C or D. For device class M, the test circuit shall be maintained by the manufacturer under document r

40、evision level control and shall be made available to the preparing or acquiring activity upon request. For device classes B and S, the test circuit shall be submitted to the qualifying activity. For device classes M, 6, and S, the test circuit shall specify the inputs, outputs, biases, and power dis

41、sipation, as applicable, in accordance with the intent specified in test mthod 1015. (2) TA - +125C, minimum. (3) Delete the sequence specified in 3.1.10 through 3.1.14 of method 5004 and substitute the first 7 test requirements of table II herein. (4) For device class M, unless otherwise noted, the

42、 requirements for device class B in method 1015 of MIL-STD-883 shall be fol lowed. (5) Static burn-in, test condition A, test method 1015 of MIL-STD-883. The test duration for each static test shall be 24 hours minimum for class S devices and in accordance with table I of method 1015 for class B dev

43、ices. (a) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to VCc/2 t0.5 V. Resistors Ri are optional on both inputs and open outputs, and required on outputs connected to Vcc/2 t0.5 V. R1 - 22Cr to 47 M. (b) For static burn-in II, all inputs shall be conn

44、ected through the R1 resistors to Vcc. Outputs may be open or connected to V /2 10.5 V. Resistors R1 are optional on open outputs, and required on outputs connected to vCc/hC*.5 V. RI = 22 to 47 m. (C) Vcc = 6.0 V t0.5 V. SIZE 5962-92157 A DAYTON, OHIO 45444 I REVISION LEVEL I SHEET I I I 16 DESC FO

45、RM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-(6) Dynamic burn-in, test condition O, method 1015 of MIL-SlD-883, (a) Input resistors = 22m to 2 Ln i20 percent. (b) Output resistors 3 22On i20 percent. (c) Vcc = 6.0 V 0.5 V. (d) The A

46、 and B pins shall be connected through the resistors in parallel to GND, to enable the outputs. All other inputs shall be connected through the resistors in parallel to a comn clock pulse (CP), as applicable. Outputs shall be connected through the resistors to Vcc/2 10.5 U. (e) CP - 25 kHz to 1 MHz

47、square wave: duty cycle - 50 percent 15 percent: VIH - 4.5 V to Vcc, VIL = O V i0.5 V; tr, tf i; 100 ns. b. Interim and final electrical test parameters shall be as specified in table II herein. c. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical paramet

48、er measurements may, at the manufacturers option, be performed separately or included in the final electrical parameter requirements. 4.2.2 Additional criteria for device classes O and V. a. The burn-in test duration, test condition and test tenperature, or approved alternatives shall be as specifie

49、d in the device manufacturers QM plan in accordance with MIL-1-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-1-38535 and shall be made available to the preparing or acquiring activity upon request. The test circ