DLA SMD-5962-88634 REV F-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K x 8 EEPROM MONOLITHIC SILICON《硅单片32K X 8电可擦可编程序只读存储器数字存储微电路》.pdf

《DLA SMD-5962-88634 REV F-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K x 8 EEPROM MONOLITHIC SILICON《硅单片32K X 8电可擦可编程序只读存储器数字存储微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-88634 REV F-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 32K x 8 EEPROM MONOLITHIC SILICON《硅单片32K X 8电可擦可编程序只读存储器数字存储微电路》.pdf（21页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added case outline letter U to the drawing. Removed ESDS requirements from drawing. Editorial changes throughout. 90-01-26 M. A. Frye B Changes in accordance with NOR 5962-R117-92 92-01-27 M. A. Frye C Redrawn with changes. Add device type 05. Ad

2、d software data protect. Added vendor CAGE 60395 and 61394 as approved sources. Editorial changes throughout. 92-12-18 M.A. Frye D Changes in accordance with NOR 5962-R216-93 93-08-20 M.A. Frye E Updated boilerplate. Removed data retention and endurance tests from drawing. Removed programming specif

3、ics from drawing. - glg 00-08-07 Raymond Monnin F Boilerplate update and part of five year review. tcr 07-03-29 Robert M. Heber REV SHEET REV F F F F F SHEET 15 16 17 18 19 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice D

4、EFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 32K x 8 EEPROM, MONOLITHIC SILICON AND AGENCIES OF

5、THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-02-13 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67264 5962-88634 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E270-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

6、 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or

7、Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-88634 01 U A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device Generic Circuit Acce

8、ss Write type number function time speed Write mode End of write indicator Endurance 01 See 6.6 32K x 8 EEPROM 120 ns 10 ms byte/page DATA polling/toggle bit 10,000 cycles 02 See 6.6 32K x 8 EEPROM 120 ns 3 ms byte/page DATA polling/toggle bit 10,000 cycles 03 See 6.6 32K x 8 EEPROM 90 ns 10 ms byte

9、/page DATA polling/toggle bit 10,000 cycles 04 See 6.6 32K x 8 EEPROM 90 ns 3 ms byte/page DATA polling/toggle bit 10,000 cycles 05 See 6.6 32K x 8 EEPROM 70 ns 10 ms byte/page DATA polling/toggle bit 10,000 cycles 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as f

10、ollows: Outline letter Descriptive designator Terminals Package style U See figure 1 28 Pin grid array X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y CQCC1-N32 32 Rectangular leadless chip carrier Z CDFP4-F28 28 Flat pack 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.3 V dc to +6.25 V d

11、c Storage temperature range-65C to +150C Maximum power dissipation (PD) .1.0 W Lead temperature (soldering, 10 seconds).+300C Junction temperature (TJ) 2/+175C Thermal resistance, junction-to-case (JC) .See MIL-STD-1835 Input voltage range (VIL, VIH)-0.3 V dc to +6.25 V dc Data retention 20 years (m

12、inimum) Endurance10,000 cycles (minimum) Chip clear voltage (Vh) .13.0 V dc 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) .-55C to +125C Input voltage, low range (VIL) .-0.1 V dc to +0.8 V dc Input voltage, high range

13、 (VIH) .+2.0 V dc to VCC+ 0.3 V dc 1/ All voltages are referenced to VSS(ground). 2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883.Provided by IHSNot for ResaleNo reproduction or netwo

14、rking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specifica

15、tion, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specif

16、ication for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (

17、Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text o

18、f this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in

19、accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-

20、PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modificatio

21、ns shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions.

22、The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.2 Truth table(s). The truth table(s) for unprogrammed devices shall be as specified on figure 3

23、. 3.2.2.1 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with figure 1 and 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical pe

24、rformance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5

25、Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacture

26、r has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in

27、 accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHE

28、ET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS= 0 V, 4.5 V VCC 5.5 V, unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max Supply current ICC1CE = OE = VIL, WE = VIH, 1, 2, 3 All 80 mA (opera

29、ting) all I/Os = 0.0 mA, inputs = VCC= 5.5 V, tAVAV= tAVAV(min) Supply current ICC2CE = VIH, OE = VIL, 1, 2, 3 01, 02 3 mA (TTL standby) all I/Os = 0.0 mA, 03, 04, 60 inputs = VCC- 0.3 V, f = 0.0 MHz 05 Supply current ICC3CE = VCC- 0.3 V, 1, 2, 3 01, 02 350 A (CMOS standby) all I/Os = 0.0 mA, 03, 04

30、, 60 mA inputs = VILor VCC- 0.3 V, f = 0.0 MHz 05 Input leakage (high) IIHVIN= 5.5 V 1, 2, 3 All 10 A Input leakage (low) IILVIN= 0.1 V 1, 2, 3 All -10 A Output leakage (high) IOHZVOUT= 5.5 V, CE = VIH2/ 1, 2, 3 All 10 A Output leakage (low) IOLZVOUT= 0.1 V, CE = VIH2/ 1, 2, 3 All -10 A Input voltag

31、e low VIL1, 2, 3 All -0.1 0.8 V Input voltage high VIH1, 2, 3 All 2.0 VCCV +0.3 V Output voltage low VOLIOL= 6.0 mA, VIH= 2.0 V, 1, 2, 3 All 0.45 V VCC= 4.5 V, VIL= 0.8 V Output voltage high VOHIOH= -4.0 mA, VIH= 2.0 V, 1, 2, 3 All 2.4 V CC= 4.5 V, VIL= 0.8 V See footnotes at end of table. Provided

32、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued

33、. Test Symbol Conditions -55C TC +125C VSS= 0 V, 4.5 V VCC 5.5 V, unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max OE high leakage IOEVH= 13 V 1, 2, 3 All -10 100 A (chip erase) Input capacitance CIVI= 0 V, VCC= 5.0 V, 4 All 10 pF TA= +25C, f = 1 MHz, see 4.3.1c 3/ 4/

34、Output capacitance COVO= 0 V, VCC= 5.0 V, 4 All 10 pF A= +25C, f = 1 MHz, see 4.3.1c 3/ 4/ Read cycle time tAVAVSee figure 4 5/ 9, 10, 11 01, 02 120 ns 03, 04 90 05 70 Address access time tAVQV9, 10, 11 01, 02 120 ns 03, 04 90 05 70 Chip enable tELQV9, 10, 11 01, 02 120 ns 03, 04 90 access time 05 7

35、0 Output enable access tOLQV9, 10, 11 01, 02 50 ns 03, 04, 05 40 Chip enable to output tELQX9, 10, 11 All 10 ns in low Z 4/ See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634

36、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS= 0 V, 4.5 V VCC 5.5 V, unless otherwise specified 1/ Group A subgroups Device type Limits Uni

37、t Min Max Chip disable to output tEHQZSee figure 4 5/ 9, 10, 11 01, 02 50 ns in high Z 4/ 03, 04, 05 40 Output enable to tOLQX9, 10, 11 All 10 ns output in low Z 4/ Output disable to tOHQX9, 10, 11 01, 02 50 ns output in high Z 4/ 03, 04, 05 40 Output hold from tAXQX9, 10, 11 All 0 ns address change

38、 Write cycle time tWHWL19, 10, 11 01, 03, 05 10 ms tEHEL102, 04 3 Address setup time tAVEL9, 10, 11 All 20 ns tAVWLAddress hold time tELAX9, 10, 11 All 50 ns tWLAXWrite setup time tWLEL9, 10, 11 All 0 ns ELWLWrite hold time tEHWH9, 10, 11 All 0 ns tWHEHSee footnotes at end of table. Provided by IHSN

39、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test

40、Symbol Conditions -55C TC +125C VSS= 0 V, 4.5 V VCC 5.5 V, unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max OE setup time tOHELSee figure 4 5/ 9, 10, 11 All 0 ns tOHWLOE hold time tEHOL9, 10, 11 All 0 ns tWHOLWE pulse width tELEH9, 10, 11 All 150 ns WLWHData setup time

41、 tDVEH9, 10, 11 All 50 ns tDVWHData hold time tEHDX9, 10, 11 All 0 ns WHDXByte load cycle tWHWL29, 10, 11 All .20 149 s Last byte loaded to tWHEL9, 10, 11 All 0 ns data polling 4/ tEHELCE setup time tELWL19, 10, 11 All 5 s Output setup time tOVHWL9, 10, 11 All 5 s CE hold time tWHEH19, 10, 11 All 5

42、s OE hold time tWHOH9, 10, 11 All 5 s See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88634 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSC

43、C FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C VSS= 0 V, 4.5 V VCC 5.5 V, unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max High voltage VHSee figure 4 5/ 9, 10, 11 All 12 13 V Chip erase tWLWH29, 10,

44、 11 All 210 ms WE pulse width for tWLWH19, 10, 11 All 10 ms chip erase 1/ DC and read mode. 2/ Connect all address inputs and OE to VIHand measure IOLZand IOHZwith the output under test connected to VOUT. 3/ All pins not being tested are to be open. 4/ Tested initially and after any design or proces

45、s changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. 5/ Tested by application of specified timing signals and conditions, including: Equivalent ac test conditions for all device types: Output load: 1 TTL gate and CL= 100 pF (minimum) or equivale

46、nt circuit. Input rise and fall times 10 ns. Input pulse levels: 0.4 V and 2.4 V. Timing measurements reference levels: Inputs 1.0 V and 2.0 V. Outputs 0.8 V and 2.0 V. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approv

47、ed source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawin