DLA SMD-5962-87644 REV D-2011 MICROCIRCUIT DIGITAL FAST CMOS NONINVERTING OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

《DLA SMD-5962-87644 REV D-2011 MICROCIRCUIT DIGITAL FAST CMOS NONINVERTING OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-87644 REV D-2011 MICROCIRCUIT DIGITAL FAST CMOS NONINVERTING OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE 75569. Add device type 02. Add case outline S. Technical changes in table I. Editorial changes throughout. 89-03-21 M. A. Frye B Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. Jak 03-07-28 Thanh V.

2、 Nguyen C Add footnote 7/ for test condition of total power supply current (ICC) to table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-12-22 Thomas M. Hess D Add footnote 9/ for total power supply current (ICCT) to table I. Update boilerplate paragraphs to the

3、 current MIL-PRF-38535 requirements. - MAA 11-02-24 David J. Corbett REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUI

4、T DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Ray Monnin APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, NONINVERTING OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWIN

5、G APPROVAL DATE 87-11-25 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-87644 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E246-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87644 DLA LAND AND MARITIM

6、E COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PI

7、N is as shown in the following example: 5962-87644 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT373 Non-inverting octa

8、l transparent latch with three state outputs, TTL compatible inputs 02 54FCT373A Non-inverting octal transparent latch with three state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Te

9、rminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc t

10、o + 6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) -20 mA DC output diode current (IOK) . -50 mA DC output current (IOUT) . 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power

11、 dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +4.5 V dc to 5.5 V dc Maximum low level input voltage (VIL) 0.

12、8 V Minimum high level input voltage (VIH) . 2.0 V Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwis

13、e specified, all voltages are referenced to ground. 3/ Maximum power dissipation must be able to withstand the added power dissipation due to short circuit testing, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

14、ING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specifi

15、ed herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard M

16、icrocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quic

17、ksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this do

18、cument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product

19、built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qual

20、ifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as des

21、cribed herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and here

22、in. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specif

23、ied on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall app

24、ly over the full (case or ambient) operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 AP

25、R 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN lis

26、ted in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indi

27、cator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A cer

28、tificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacture

29、rs product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. No

30、tification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required do

31、cumentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

32、N LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Limits 2/ Unit Min Max High-level output voltage 3006 VOHVIH= 2.0

33、 V, VIL= 0.8 V VCC= 4.5 V IOH= -300 A All 1, 2, 3 4.3 V VIH= 2.0 V, VIL= 0.8 V VCC= 4.5 V IOH= -12 mA 2.4 Low-level output voltage 3007 VOLVIH= 2.0 V, VIL= 0.8 V VCC= 3.0 V IOL= 300 A All 1, 2, 3 0.2 VIN= 2.0 V or 0.8 V VCC= 4.5 V IOL= 32 mA 0.5 Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA All -1.

34、2 V Input leakage current high 3010 IIHVIN= 5.5 V VCC= 5.5 V All 1, 2, 3 5.0 A Input leakage current low 3009 IILVIN= 0.0 V VCC= 5.5 V All 1, 2, 3 -5.0 A Three-state output leakage current high 3021 IOZH VIN= 5.5 V VCC= 5.5 V All 1, 2, 3 10.0 A Three-state output leakage current low 3020 IOZL VIN= G

35、ND VCC= 5.5 V -10.0 Short circuit output current IOS3/ VCC= 5.5 V All 1, 2, 3 -60 mA Quiescent supply current 3005 ICCQVIN 0.2 V or 5.3 V VCC= 5.5 V fIN= 0.0 MHz All 1, 2, 3 1.5 mA Quiescent supply delta, TTL input levels 3005 ICC4/ VCC= 5.5 V VIN= 3.4 V All 1, 2, 3 2.0 mA Dynamic power supply curre

36、nt ICCD5/ VCC= 5.5 V, OE = GND One bit toggling, 50% duty cycle VIN 5.3 V or VIN 0.2 V Outputs open, LE = VCCAll 1, 2, 3 0.25 mA/MHz Total power supply current ICCT6/ 7/ VCC= 5.5 V, outputs open fIN= 10 MHz 50% duty cycle One bit toggling OE = GND, LE = VCCVIN 5.3 V or VIN 0.2 V All 1, 2, 3 4.0 9/ m

37、A VIN 3.4 V or VIN= GND All 1, 2, 3 5.6 9/ mA Input capacitance 3012 CINSee 4.3.1c All 4 10.0 pF Output capacitance 3012 COUTSee 4.3.1c All 4 12.0 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

38、 DRAWING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Dev

39、ice type Group A subgroups Limits 2/ Unit Min Max Functional tests 3014 See 4.3.1d All 7, 8 L H Propagation delay time, Dn to On 3003 tPHL1,tPLH18/ CL= 50 pF RL= 500 See figure 4 01 9, 10, 11 1.5 8.5 ns 02 1.5 5.6 Propagation delay time, LE to On 3003 tPHL2,tPLH28/ 01 9, 10, 11 2.0 15.0 ns 02 2.0 9.

40、8 Propagation delay time, output enable, OE to On 3003 tPZH,tPZL8/ 01 9, 10, 11 1.5 13.5 ns 02 1.5 7.5 Propagation delay time, output disable, OE to On 3003 tPHZ,tPLZ8/ 01 9, 10, 11 1.5 12.5 ns 02 1.5 6.5 Setup time, high or low, Dn to LE ts01 9, 10, 11 2.0 ns 02 2.0 Hold time, high or low, Dn to LE

41、 th01 9, 10, 11 3.0 ns 02 1.5 Pulse width, high or low, LE tw01 9, 10, 11 6.0 ns 02 6.0 1/ For tests not listed in the referenced MIL-STD-883 (e.g.ICC), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested, as applicable, to the tests in table

42、 I herein. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, l

43、isted herein. 3/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed one second. 4/ TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 5/ This parameter is not directly testable but is derived for use in total power sup

44、ply calculations. 6/ ICC= ICCQ+ (ICC x DH x NT) + (ICCDx fIx NI) where: DH= Duty cycle for TTL inputs high NT= Number of TTL inputs at DHfI= Input frequency in MHz NI= Number of inputs at fI7/ For ICCtest in an ATE environment, the effect of parasitic output capacitive loading from the test environm

45、ent must be taken into account, as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offset factors must be applied to the test result. 8/ The minimum limits are guaranteed, if not tested, to the limits specified in table I. 9/ The Vendor

46、 PIN devices (54FCT373DMQB, 54FCT373FMQB and 54FCT373LMQB) tested of total power supply current (ICCT) and meet limit, ICCT= 5.5 mA at VIN 5.3 V or VIN 0.2 V, and ICCT= 6.0 mA at VIN 3.4 V or VIN = GND; although table I stated ICCT= 4.0 mA and 5.6 mA. Provided by IHSNot for ResaleNo reproduction or

47、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outlines R, S, and 2 Terminal number Terminal symbol 1 OE 2 O0 3 D0 4 D15 O1 6 O2 7 D2

48、 8 D39 O3 10 GND 11 LE 12 O4 13 D4 14 D515 O5 16 O6 17 D6 18 D719 O7 20 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87644 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Inputs Output Dn LE OE On H L X X H H L X L L L H H L On (no change) * Z H = High voltage level L = Low voltage level X = Immaterial Z = High impedance * = The last data inputs that satisfy the setup and hold