DLA DSCC-VID-V62 09638-2011 MICROCIRCUIT LINEAR DUAL HIGH SPEED SINGLE SUPPLY VOLTAGE COMPARATOR MONOLITHIC SILICON.pdf
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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY
2、RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, DUAL, HIGH SPEED, SINGLE SUPPLY, VOLTAGE COMPARATOR, MONOLITHIC SILICON 11-06-29 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09638 REV PAGE 1 OF 12 AMSC N/A 5962-V053-11 Provided by IHSNot for ResaleNo reproduction or networking
3、permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09638 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a dual, high speed, single supply, voltage comparator microcircuit, with an operating temperatur
4、e range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/09638 - 01 X B Drawing Device type
5、 Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 MAX942 Dual, high speed, single supply voltage comparator 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95
6、Package style X 8 MS-012-AA Small outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot fo
7、r ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09638 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Power supply voltage ranges: Supply voltage +V to GND . +6.5 V Differential input voltage . -0.3
8、 V to (+V + 0.3 V) Common mode input voltage . -0.3 V to (+V + 0.3 V) Current into input pins 20 mA Junction temperature range (TJ) 150C Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Electrostatic discharge (ESD): Human body model (HBM) . 1,500 V M
9、oisture sensitivity level (MSL) Level 1 1.4 Recommended operating conditions. 2/ Supply voltage range (+V) 2.7 V to 5.5 V Operating free-air temperature range (TA) . -55C to +125C 1.5 Thermal data table. Case outline letter X X Units PC board Single layer Multi-layer 3/ Power dissipation (PD), maxim
10、um at +70C 471 588 mW Power dissipation (PD) derating above +70C 5.9 7.4 mW/C Thermal resistance, junction to case (JC) 40 38 C/W Thermal resistance, junction to ambient (JA) 170 136 C/W 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These
11、are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Use of this product be
12、yond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 3/ Package thermal resistances were obtained using the method described in JEDEC specification JE
13、SD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09638 REV P
14、AGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arl
15、ington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional)
16、 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table
17、 I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown i
18、n figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09638 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions +V = 2.7 V to 5.5 V u
19、nless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Positive supply voltage +V -55C to +125C 01 2.7 5.5 V Input voltage range VCMR2/ -55C to +125C 01 -0.2 +V + 0.2 V Input referred trip VTRIPVCM= 0 V or VCM= +V 3/ +25C 01 3 mV points -55C to +125C 4 Input offset voltage VOSVCM= 0
20、 V or VCM= +V 4/ +25C 01 2 mV -55C to +125C 3 Input bias current IBVIN= VOS, 5/ VCM= 0 V or VCM= +V -55C to +125C 01 400 nA Input offset current IOSVIN= VOS, VCM= 0 or VCM= +V -55C to +125C 01 150 nA Input differential clamp voltage VCLAMPForce 100 A into +IN, -IN = GND, measure +VIN- -VIN, see figu
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