IEC 62343-4-1-2016 Dynamic modules - Part 4-1 Software and hardware interface - 1 x 9 wavelength selective switch《动态模块 第4-1部分 软件和硬件接口 1x9波长选择开关》.pdf
《IEC 62343-4-1-2016 Dynamic modules - Part 4-1 Software and hardware interface - 1 x 9 wavelength selective switch《动态模块 第4-1部分 软件和硬件接口 1x9波长选择开关》.pdf》由会员分享,可在线阅读,更多相关《IEC 62343-4-1-2016 Dynamic modules - Part 4-1 Software and hardware interface - 1 x 9 wavelength selective switch《动态模块 第4-1部分 软件和硬件接口 1x9波长选择开关》.pdf(34页珍藏版)》请在麦多课文档分享上搜索。
1、 IEC 62343-4-1 Edition 1.0 2016-03 INTERNATIONAL STANDARD Dynamic modules Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch IEC 62343-4-1:2016-03(en) THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2016 IEC, Geneva, Switzerland All rights reserved. Unless otherwise specif
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10、wish to give us your feedback on this publication or need further assistance, please contact the Customer Service Centre: csciec.ch. IEC 62343-4-1 Edition 1.0 2016-03 INTERNATIONAL STANDARD Dynamic modules Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch INTERNATIONAL ELEC
11、TROTECHNICAL COMMISSION ICS 33.180.20 ISBN 978-2-8322-3199-9 Registered trademark of the International Electrotechnical Commission Warning! Make sure that you obtained this publication from an authorized distributor. 2 IEC 62343-4-1:2016 IEC 2016 CONTENTS FOREWORD . 3 INTRODUCTION . 5 1 Scope 6 2 No
12、rmative references. 6 3 Terms, definitions and abbreviations 6 3.1 Terms and definitions 6 3.2 Abbreviations 6 4 Basic configuration of WSS interface 7 5 Software interface . 8 6 Hardware interface Electrical connector 11 (informative) Hardware interface details 12 Annex A(informative) DPRAM memory
13、map details and timing charts . 14 Annex B Bibliography . 30 Figure 1 Basic configuration of WSS interface 7 Figure B.1 DPRAM READ CYCLE timing 25 Figure B.2 DPRAM WRITE CYCLE timing . 26 Figure B.3 POWER ON timing 26 Figure B.4 START timing 27 Figure B.5 MASTER RESET timing 27 Figure B.6 SOFT RESET
14、 timing . 28 Figure B.7 DPRAM BUSY timing 28 Figure B.8 ALARM timing . 29 Table 1 Software interface . 9 Table 2 DPRAM memory map 10 Table A.1 Connector form 12 Table A.2 Pin assignment 12 Table A.3 Supply voltages and currents 13 Table A.4 Low voltage TTL thresholds 13 Table A.5 Power consumption 1
15、3 Table B.1 DPRAM memory map specification A 14 Table B.2 DPRAM memory map specification B 15 Table B.3 Signal time specification . 24 IEC 62343-4-1:2016 IEC 2016 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ DYNAMIC MODULES Part 4-1: Software and hardware interface 1 x 9 wavelength selective switch
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