DLA SMD-5962-98538 REV A-2006 MICROCIRCUIT DIGITAL-LINEAR CMOS LOW-VOLTAGE 10 -BIT ANALOG TO DIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS MONOLITHIC SILICON《微型电路 数字线型 .pdf

《DLA SMD-5962-98538 REV A-2006 MICROCIRCUIT DIGITAL-LINEAR CMOS LOW-VOLTAGE 10 -BIT ANALOG TO DIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS MONOLITHIC SILICON《微型电路 数字线型 .pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-98538 REV A-2006 MICROCIRCUIT DIGITAL-LINEAR CMOS LOW-VOLTAGE 10 -BIT ANALOG TO DIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS MONOLITHIC SILICON《微型电路 数字线型 .pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - drw 06-03-09 Raymond Monnin REV SHET REV A A A A A A A A SHEET 15 16 17 18 19 20 21 22 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 1

2、3 14 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL-LINEAR, CMOS, LOW-V

3、OLTAGE 10-BIT ANALOG TO DIGITAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 98-06-24 CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-98538 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E258-06 Provided by IHSN

4、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance c

5、lass levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are r

6、eflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 98538 01 Q R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designat

7、or. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indic

8、ates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 TLV1548 Low-voltage, 10-bit, A/D converters with serial control and 8 analog inputs 1.2.3 Device class designator. The device class designator is a sin

9、gle letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualifica

10、tion to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as speci

11、fied in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

12、 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/, 2/ Supply voltage range (VCC) . -0.5 V dc to +6.5 V dc 2/ Input voltage range (VI) (any input) -0.3 V to VCC+0.3 V Output voltage (VO) -0.3 V to VCC+0.3 V Positive reference voltage, VREF +VCC+ 0.1 V Negative reference

13、 voltage, VREF - -0.1 V Peak input current II(any input) 20 mA Peak total input current (all inputs) -30 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature 1, 6 mm (1/16 inch) from case for 10 seconds . +260C Maximum power dissipation, TA25C: 3/ Case R 1894 mW Case 2 . 1375 mW Ther

14、mal resistance, junction-to-case (JC): Case R 28C/W Case 2 . 20C/W Thermal resistance, junction-to-ambient (JA): Case R 66C/W Case 2 . 65C/W Junction temperature (TJ) 150 C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +2.7 V dc to +5.5 V dc Positive reference Voltage, (VREF+) V

15、CC 4/ Negative reference Voltage, (VREF-) . 0 V 4/Differential reference Voltage, VREF+-VREF-+2.5 V dc to Vcc + 0.2 V dc 4/ Analog input voltage range (VI) . 0 to VCC4/ High level input voltage, (VIH) 2.1 V dc Low level input voltage, (VIL) . 0.6 V dc Setup time, input data bits valid before I/O CLK

16、, tsu(A) . 100 ns Hold time, input data bits valid after I/O CLK, th(A). 5 ns Setup time, CS to I/O CLK, tsu(CS) . 5 ns Hold time, I/O CLK to CS , th(CS). 65 ns Pulse duration, FS high, twH(FS) . 1 I/O CLK periods _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the devi

17、ce. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltage values are with respect to GND with REF- and GND wired together. (unless otherwise noted). 3/ Derate factor at TA 25C for case R is 15.1 mW/C, and for case 2 is 11.0 mW/C. 4/ Analog input volt

18、ages greater than that applied to REF+ convert as all ones (1111111111), while input voltage less than that applied to REF- convert as all zeros (0000000000). The device is functional with reference voltages down to 1 V (Vref +- Vref -); however, the electrical specifications are no longer applicabl

19、e. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continue

20、d. Pulse duration, CSTART , tw(CSTART) 0.84 s Setup time, CS to CSTART , tsu(CSTART). 10 ns Clock frequency at I/O CLK , fCLK; VCC= 5.5 V. 0.1 to 10 MHz VCC= 2.7 V. 0.1 to 2.81 MHz Pulse duration, I/O CLK high, twH(I/O); VCC= 5.5 V. 50 ns VCC= 2.7 V. 100 ns Pulse duration, I/O CLK low, twL(I/O); VCC

21、= 5.5 V. 50 ns VCC= 2.7 V 100 ns Transition time, I/O CLK tt(I/O) 1 s 5/ Transition time, DATA IN, tt(DATA IN). 10 s Transition time, CS , tt(CS) 10 s Transition time, FS, tt(FS) 10 s Transition time, CSTART , tt(CSTART). 10 s Operating ambient temperature range (TA). -55C to +125C 2. APPLICABLE DOC

22、UMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DE

23、FENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - Li

24、st of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia,

25、PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained

26、. _ 5/ This is the time required for the I/O CLK signal to fall from VIH max to VILmin or to rise from VILmax to VIHmin. In the vicinity of normal room temperature, the devices function with an input clock transition time as slow as 1s for remote data acquisition applications where the sensor and th

27、e A/D converter are placed several feet away from the controlling microprocessor. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

28、A SHEET 5 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM pla

29、n shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, const

30、ruction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connecti

31、ons shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block or logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified

32、herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The

33、electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacture

34、r has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.

35、1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certif

36、icate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDB

37、K-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requir

38、ements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Noti

39、fication of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs ag

40、ent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by

41、 this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L

42、EVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxHigh level output voltage VOHIOH= -0.2 mA, VCC= 5.5 V 1, 2, 3 01 2.4 V IOH= -20 A, VCC= 2.7 V VCC-

43、 0.1 Low level output voltage VOLIOL= 0.8 mA, VCC= 5.5 V 1, 2, 3 01 0.4 V IOL= 20 A, VCC= 2.7 V 0.1 High impedance output current IOZVOUT= VCC, CS = VCC1, 2, 3 01 2.5 A VOUT= 0 V, CS = VCC-2.5 High level input current IIHVIN = VCC1, 2, 3 01 2.5 A Low level input current IILVIN = 0 V 1, 2, 3 01 2.5 A

44、 Operating supply current ICCI/O CLK = GND, VCC= 3.3 V to 5.5 V, Conversion speed = fast, For all digital inputs, 0 VIN 0.3 V or VIN VCC - 0.3 V 1, 2, 3 01 1.5 mA I/O CLK = GND, VCC= 3.3 V to 5.5 V, Conversion speed = slow, For all digital inputs, 0 VIN 0.3 V or VIN VCC - 0.3 V 1.0 I/O CLK = GND, VC

45、C= 2.7 V to 3.3 V, Conversion speed = slow, For all digital inputs, 0 VIN 0.3 V or VIN VCC - 0.3 V 0.75 Power down supply current ICC(PD)For all digital inputs, 0 VIN 0.3 V or VIN VCC - 0.3 V 1, 2, 3 01 25 A Selected channel leakage current IlkgSelected channel at VCC, Unselected channel at 0 V 1, 2

46、, 3 01 1.0 A Selected channel at 0 V, Unselected channel at VCC-1.0 Maximum static analog reference current into REF+ - Vref+ = VCC= 5.5V, Vref- = GND 1, 2, 3 01 1 A Input capacitance, analog inputs CIN2/ 1, 2, 3 01 55 pF Input capacitance, control inputs CIN2/ 1, 2, 3 01 15 pF Input multiplexer res

47、istance ZINVCC= 4.5 V 2/ 1, 2, 3 01 1 k VCC= 2.7 V 2/ 5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98538 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L

48、EVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Linearity Error EL3/ 1, 2, 3 01 1 LSB Differential linearity error ED4/ 1, 2, 3 01 1 LSB Offset error EO4/ 5/ 1, 2, 3 01 1.5 LSB Gain error EG4/ 5/ 1, 2, 3 01 1 LSB Total unadjusted error ET6/ 1, 2, 3 01 1.75 LSB Functional te