DLA SMD-5962-85128 REV E-2009 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS OCTAL D-TYPE LATCH WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE 01295 to case outlines 01RX and 012X and add vendor CAGE 27014 to case outline 012X. Convert to military drawing format. Change code indent. No. to 67268. 87-11-18 R. P. Evans B Changes in accordance with NOR 5962-R188-94. - tvn 9

2、4-05-24 Monica L. Poelking C Update boilerplate to MIL-PRF-38535 requirements. - jak 01-10-12 Thomas M. Hess D Add class V criteria. Add table III, delta limits. Editorial changes throughout. jak 03-07-16 Thomas M. Hess E Add JEDEC Standard 7-A in paragraphs 2.2 and 4.4.1c. Update boilerplate paragr

3、aphs to the current MIL-PRF-38535 requirements. - LTG 09-11-17 Thomas M. Hess CURRENT CAGE CODE IS 67268 REV SHET REV SHET REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg A. Pitz DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218

4、-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL D-TYPE LATCH WITH THREE-STATE OUTPUTS, MONOLITH

5、IC SILICON DRAWING APPROVAL DATE 85-12-10 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 85128 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E035-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPL

6、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead

7、finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 85128 01 R A Drawing number Device type

8、 (see 1.2.2) Case outline(see 1.2.4) Lead finish(see 1.2.5)For device class V: 5962 - 85128 01 V R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA designa

9、tor. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indi

10、cates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC573 Octal D-type latch with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the

11、product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self

12、-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline lett

13、er Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for

14、 device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Su

15、pply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage . -0.5 V dc to VCC+0.5 V dc DC output voltage . -0.5 V dc to VCC+0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (per pin) 35 mA DC VCCor GND current (per pin) . 70 mA Storage temperature range (TSTG) . -65C to +150C

16、Maximum power dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature

17、 range (TC) . -55C to +125C Input rise or fall time: VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns Minimum setup time (ts): TC= +25C: VCC= 2.0 V . 75 ns VCC= 4.5 V . 15 ns VCC= 6.0 V . 13 ns TC= -55C/+125C: VCC= 2.0 V . 110 ns VCC= 4.5 V . 22 ns VCC= 6.0 V . 19 ns Minimum hol

18、d time (th): TC= +25C: VCC= 2.0 V . 30 ns VCC= 4.5 V . 6 ns VCC= 6.0 V . 5 ns TC= -55C/+125C: VCC= 2.0 V . 45 ns VCC= 4.5 V . 9 ns VCC= 6.0 V . 8 ns Minimum pulse width (tW): TC= +25C: VCC= 2.0 V . 80 ns VCC= 4.5 V . 16 ns VCC= 6.0 V . 14 ns TC= -55C/+125C: VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC

19、= 6.0 V . 20 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ For TC= +100C to +125C, derate linear

20、ly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government s

21、pecification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL

22、-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcir

23、cuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. Th

24、e following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 7-A - Standard for Description of 54/74HCXXXXX and 54/74HCTXXX

25、XX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited h

26、erein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance wit

27、h MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38

28、535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for dev

29、ice class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be

30、as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPL

31、Y CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specif

32、ied in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with th

33、e PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA de

34、signator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “

35、Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the req

36、uirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an appr

37、oved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conform

38、ance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product

39、(see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable re

40、quired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSN

41、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test condi

42、tions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Unit Min Max High-level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 1, 2, 3 4.4 VCC= 6.0 V 1, 2, 3 5.9 VIN= VIHor VILIOH= -6.0 mA VCC= 4.5 V 1, 2, 3 3.7 VIN= VIHor VILIOH= -7.8 mA VCC= 6.0 V

43、 1, 2, 3 5.2 Low-level output voltage VOLVIN= VIHor VILIOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 1, 2, 3 0.1 VCC= 6.0 V 1, 2, 3 0.1 VIN= VIHor VILIOL= +6.0 mA VCC= 4.5 V 1, 2, 3 0.4 VIN= VIHor VILIOL= +7.8 mA VCC= 6.0 V 1, 2, 3 0.4 High-level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.

44、5 V 3.15 VCC= 6.0 V 4.2 Low-level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C, See 4.4.1c 4 10 pF Output capacitance COUTVIN= 0.0 V, TC= +25C, See 4.4.1c 4 20 pF Quiescent current ICCVIN= VCCor GND VCC= 6.0 V 1, 2, 3 160 A Inpu

45、t leakage current IINVIN= VCCor GND VCC= 6.0 V 1, 2, 3 1.0 A Three-state output leakage current IOZVIN= VIHor VILVOUT= VCCor GND 1, 2, 3 10.0 A Functional tests See 4.4.1b 7 Propagation delay time, mD to mQ tPLH1, tPHL13/ CL= 50 pF See figure 4 VCC= 2.0 V 9 175 ns 10, 11 265 VCC= 4.5 V 9 35 10, 11 5

46、3 VCC= 6.0 V 9 30 10, 11 45 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85128 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR

47、 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, LE to mQ tPLH2, tPHL23/ CL= 50 pF See figure 4 VCC= 2.0 V 9 175 ns 10, 11 265 VCC= 4.5 V 9 35 10, 11

48、53 VCC= 6.0 V 9 30 10, 11 45 Propagation delay time, output enable, OE to mQ tPZH, tPZL3/ CL= 50 pF See figure 4 VCC= 2.0 V 9 175 ns 10, 11 265 VCC= 4.5 V 9 35 10, 11 53 VCC= 6.0 V 9 30 10, 11 45 Propagation delay time, output disable, OE to mQ tPHZ, tPLZ3/ CL= 50 pF See figure 4 VCC= 2.0 V 9 175 ns 10, 11 265 VCC= 4.5 V 9 35 10, 11 53 VCC= 6.0 V 9 30 10, 11 45 Transition time, output rise and fall tTHL, tTLH4/ CL= 50 pF See figure 4 VCC= 2.0 V 9 60 ns 10, 11 90 VCC= 4.5 V 9 12 10, 11 18 VCC= 6.0 V 9 10 10, 11 15 1/ For a power supply of 5.0 V 10% the worst case output v