DLA SMD-5962-84129 REV F-2009 MICROCIRCUITS MEMORY DIGITAL BIPOLAR PROGRAMMABLE LOGIC MONOLITHIC SILICON.pdf

《DLA SMD-5962-84129 REV F-2009 MICROCIRCUITS MEMORY DIGITAL BIPOLAR PROGRAMMABLE LOGIC MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-84129 REV F-2009 MICROCIRCUITS MEMORY DIGITAL BIPOLAR PROGRAMMABLE LOGIC MONOLITHIC SILICON.pdf（32页珍藏版）》请在麦多课文档分享上搜索。

1、 DSCC FORM 2233 APR 97 5962-E087-10 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Convert to military drawing format. Add vendor CAGE 01295. Changes to table I. Delete subgroup 9 from final electrical test parameters. Add case outline X. Added four devices 09 - 12. 87 JUL 06 M. A. Frye D Upda

2、te part numbers for vendor CAGE number 01295. Correction on page 18, terminal connections. Editorial changes throughout. Add vendor CAGE numger 01295 as a supplier of the K package for device types 01 through 08. Changes to pages 5 and 6 table I. Changes to pages 10 and 11 terminal connections. Chan

3、ges on pages 21 - 28. 88 MAY 06 M. A. Frye E Correct figure 1 device types 02 and 04 for case outline X. Boilerplate updated. ksr 04 AUG 06 Raymond Monnin F Update drawing to current requirements. Editorial changes throughout. ksr. 09 NOV 30 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING

4、HAS BEEN REPLACED CURRENT CAGE CODE 67268 REV SHET REV F F F F F F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg Pitz DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

5、OHIO 43218-3990 STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael Frye MICROCIRCUITS, MEMORY, DIGITAL, BIPOLAR, PROGRAMMABLE LOGIC, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAW

6、ING APPROVAL DATE 84 08 - 24 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 84129 SHEET 1 OF 29 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84129 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI

7、SION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following e

8、xample: 84129 01 J X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit 01, 09 PAL20L8A, L8A-2 20-input 8-output AND-OR invert gate array 02,

9、10 PAL20R8A, R8A-2 20-input 8-output registered AND-OR gate array 03, 11 PAL20R6A, R6A-2 20-input 6-output registered AND-OR gate array 04, 12 PAL20R4A, R4A-2 20-input 4-output registered AND-OR gate array 05 PAL20L10A 20-input 10-output AND-OR invert gate array 06 PAL20X8A 20-input 8-output registe

10、red AND-OR-XOR gate array 07 PAL20X10A 20-input 10-output registered AND-OR-XOR gate array 08 PAL20X4A 20-input 4-output registered AND-OR-XOR gate array 1.2.2 Case outlines. The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package

11、 style J GDIP1-T24 or CDIP2-T24 24 dual-in-line package K GDFP2-F24 or CDFP3-24 24 flat package L GDIP3-T24 or CDIP4-T24 24 dual-in-line package X CQCC1-N28 28 square chip carrier package 1/ 3 CQCC1-N28 28 square chip carrier package 1/ 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-3

12、8535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) - -0.5 V dc to +12.0 V dc Input voltage range - - -1.5 V dc to +5.5 V dc Storage temperature range - -65C to +150C Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): 2/ 3/ Cases J, K,

13、L, X, and 3 - (See MIL-STD-1835) Output voltage applied - - -1.5 V dc to +12 V dc Output sink current - - 100 mA Maximum power dissipation(PD) 3/ - 1.2 W Maximum junction temperature (TJ) - +175C 1/ See figure 1. 2/ Heat sinking is recommended to reduce the junction temperature. 3/ Must withstand th

14、e added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84129 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.4 Re

15、commended operating conditions. Supply voltage (VCC) - 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) - 2.0 V dc Maximum low level input voltage (VIL) - 0.8 V dc Case operating temperature range (TC) - -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, s

16、tandards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - In

17、tegrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings.

18、MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflic

19、t between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requi

20、rements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional c

21、ertification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herei

22、n. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and p

23、hysical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.2.1

24、 Unprogrammed devices. The truth tables for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.4), the devices shall be programmed by the manufacturer prior to test with a minimum of 50 percent of the tota

25、l number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. Provided by IHSNot for Resale

26、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84129 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3.2.3 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3.2.4 Ca

27、se outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrica

28、l test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein.

29、 In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be

30、 marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compli

31、ance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of

32、 MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shal

33、l be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Center Columbus (DSCC), DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made avail

34、able onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for selection in the contract, using an altered item drawing.

35、 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device de

36、livered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

37、TANDARD MICROCIRCUIT DRAWING SIZE A 84129 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. _ Test Symbol Conditions 1/ Group A Device Limits Unit -55C 2.0 V, IOH= -2 mA Low level output voltage VO

38、LVCC= 4.5 V, VIL2.0 V, IOL= 12 mA High level input voltage VIHVCC= 5.5 V 2/ 1,2,3 All 2.0 V Low level input voltage VILVCC= 5.5 V 2/ 1,2,3 All 0.8 V High level input current IIHVCC= 5.5 V, OE 1,2,3 All 40 A VI= 2.4 V 3/ others 25 Low level input current IILVCC= 5.5 V, VI= 0.4 V 3/ 1,2,3 All -0.25 mA

39、 _ Output short circuit IOSVCC= 5.5 V, VO= .5 V 4/ 1,2,3 01-08 -30 -250 mA current 09,10, 11,12 -130 Input current IIVCC= 5.5 V, VI= 5.5 V 1,2,3 All 1.0 mA _ Off-state output current IOZLVCC= 5.5 V, VIL= 0.8 V, 1,2,3 All -250 A VIH= 2.4 V, VO= 0.4 V 3/ _ Off-state output current IOZHVCC= 5.5 V, VIL=

40、 0.8 V, 1,2,3 All 100 A VIH= 2.4 V, VO= 2.4 V 3/ _ Supply current ICCVCC= 5.5 V 1,2,3 01,02, 210 mA 03,04 05 165 06,07, 08 180 09,10, 11,12 105 _ Functional testing See 4.3.1c 7,8A,8B All _ See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

41、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84129 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. _ Test Symbol Conditions 1/ Group A Device Limits Unit -55C TC +125C subg

42、roups type unless otherwise specified Min Max _ Propagation delay data tPHLVCC= 5.0 V, CL= 50 pF +10%, 9,10,11 01,03, 30 ns input to output R1= 390, +5%, 04 R2= 750 +5% 05,06, (or equivalent load circuit) 08 35 Unless otherwise specified 09,11, 12 50 _ Propagation delay data tPLH 9,10,11 01,03, 30 ns input to output 04