DLA SMD-5962-10242 REV A-2013 MICROCIRCUIT CMOS COMPARATOR QUAD MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated section 1.5 and the footnotes. Table I: Made changes throughout to the test conditions, limits, and additional tests were added to reflect the RHA test requirements for these devices. Made clarifications to table IIIA and table IV. Update
2、d section 4.3.5. -sld 13-12-20 Charles F. Saffle REV SHEET REV A A A A SHEET 15 16 17 18 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/
3、 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Greg Cecil APPROVED BY Charles F. Saffle MICROCIRCUIT, CMOS, COMPARATOR, QUAD, MONOLITHIC SILICON DRAWING APPROVAL DATE 13-04-16 AMSC N/A REVISION LEVEL A SIZE A C
4、AGE CODE 67268 5962-10242 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E017-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-10242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC F
5、ORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation
6、hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 H 10242 01 K X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2
7、.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit
8、 function as follows: Device type Generic number Circuit function 01 RHD5910 Quad Comparator 02 RHD5911 Quad Comparator, Clocked outputs 03 RHD5912 Quad Comparator, Open drain outputs 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assuran
9、ce level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class avai
10、lable. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H sc
11、reening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H,
12、 or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specifie
13、d quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-10242 DLA LAND A
14、ND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 16 Flat package with formed leads 1.2.5 Lead
15、finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) . +7.0 V dc Input voltage (VIN) range . VCC+0.4 V, GND -0.4 V Junction temperature (TJ) . +150C Power +25C 250 mW Storage temperature range . -65C to +150C Lead temperature (solderin
16、g, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage (VCC) range +3.0 V dc to +5.5 V dc Input Common Mode (VCM) range: Device types 01 and 02 VCCto GND Device type 03 VCC-1.5 V to GND Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. 2/ Maximum Tota
17、l Ionizing Dose (TID) (dose rate = 50 - 300 rad(Si)/s): In accordance with MIL-STD-883, method 1019, condition A 1 Mrad(Si) Enhanced Low Dose Rate Sensitvity (ELDRS) . 3/ Single Event Latchup (SEL) 100MeV-cm2/mg 4/ Neutron Displacement Damage ( 1 x 1014 neutrons/cm2) . 3/ 2. APPLICABLE DOCUMENTS 2.1
18、 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPEC
19、IFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. _ 1/ Stresses above the absolute maximum ratings may cause permanent
20、 damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ See section 4.3.5 for the manufacturers radiation hardness assurance analysis and testing. 3/ Not tested, Immune by 100 percent CMOS technology. 4/ Single Event Latchup (SEL) immunity i
21、s accomplished by double, fully enclosing, guard rings in the CMOS design layout. The guard rings eliminate the parasitic pnpn structure that is responsible for latchup in CMOS circuits. This limit is guaranteed by design or process, but not tested. Provided by IHSNot for ResaleNo reproduction or ne
22、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-10242 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standar
23、d Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing
24、and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device clas
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