DLA DSCC-VID-V62 12606 REV A-2012 MICROCIRCUIT LINEAR DUAL HIGH SPEED DIFFERENTIAL LINE DRIVER MONOLITHIC SILICON.pdf

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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY

2、RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, DUAL, HIGH SPEED DIFFERENTIAL LINE DRIVER, MONOLITHIC SILICON 12-01-04 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12606 REV PAGE 1 OF 12 AMSC N/A 5962-V013-12 Provided by IHSNot for ResaleNo reproduction or networking permitted

3、without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual high speed differential line driver microcircuit, with an operating temperature ra

4、nge of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12606 - 01 X E Drawing Device type Case

5、 outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 uA9638C-EP Dual high speed differential line driver 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package sty

6、le X 8 MS-012-AA Plastic small outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other 1.3 Absolute maximum rat

7、ings. 1/ Supply voltage range (VCC) . -0.5 V to 7 V 2/ Input voltage range -0.5 V to 7 V Continuous total power dissipation (PD) . See 1.5 dissipation rating table Lead temperature 1.6 mm (1/16 inch) from 10 seconds . 260C Storage temperature range (TSTG) -65C to +150C _ 1/ Stresses beyond those lis

8、ted under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated cond

9、itions for extended periods may affect device reliability. 2/ Voltage values except differential output voltages (VOD) are with respect to network GND. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE I

10、DENT NO. 16236 DWG NO. V62/12606 REV PAGE 3 1.4 Recommended operating conditions. 3/ Supply voltage range (VCC) . 4.75 V to 5.25 V High level input voltage (VIH) . 2 V minimum Low level input voltage (VIL) 0.8 V maximum High level output current (IOH) . -50 mA maximum Low level output current (IOL)

11、50 mA maximum Operating free-air temperature range (TA) . -40C to +85C 1.5 Dissipation ratings. Package Power rating TA= 25C Derating factor TA 70C Power rating TA= 85C Case X 725 mW 5.8 mW/C 377 mW 1.6 Thermal characteristics. Thermal metric Symbol Case X Unit Thermal resistance, junction-to-ambien

12、t 4/ JA114.3 C/W Thermal resistance, junction-to-case JC59.1 C/W Thermal resistance, junction-to-board 5/ JB55.3 C/W Characterization parameter, junction-to-top 6/ JT12.7 C/W Characterization parameter, junction-to-board 7/ JB54.7 C/W 3/ Use of this product beyond the manufacturers design rules or s

13、tated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 4/ The thermal resistance, junction-to-ambient under natural convection is obtained in a simulation on a JEDEC standard, high-K board, as

14、 specified in JESD51-7, in an environment described in JESD51-2a. 5/ The thermal resistance, junction-to-board is obtained by simulating in an environment with a ring cold plate fixture to control the printed circuit board (PCB) temperature, as described in JESD51-8. 6/ Characterization parameter, j

15、unction-to-top (JT) estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). 7/ Characterization parameter, junction-to-board (JB) estimates the junction temperature of a d

16、evice in a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO.

17、 16236 DWG NO. V62/12606 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices EIA/JESD51-2a Integrated Circuits Thermal Test Method Environment Conditions Natural Convection (Still Air) EIA/JESD51-7 High E

18、ffective Thermal Conductivity Test Board for Leaded Surface Mount Packages EIA/JESD51-8 Integrated Circuits Thermal Test Method Environment Conditions Junction-to-Board EIA-422 Electrical Characteristics of Balanced Voltage Digital Interface Circuits. (Applications for copies should be addressed to

19、the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or

20、logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performan

21、ce characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal

22、 connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAGE 5 TABLE I. Electrical performance charac

23、teristics. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max Input clamp voltage VIKVCC= 4.75 V, II= -18 mA -40C to +85C 01 -1.2 V High level output voltage VOHIOH= -10 mA, VCC= 4.75 V, VIH= 2 V, VIL= 0.8 V -40C to +85C 01 2.5 V IOH= -40 mA, VCC= 4.75 V, VIH= 2 V, VIL= 0.8 V 2

24、Low level output voltage VOLIOL= 40 mA, VCC= 4.75 V, VIH= 2 V, VIL= 0.8 V -40C to +85C 01 0.5 V Magnitude of differential output voltage |VOD1| VCC= 5.25 V, IO= 0 A -40C to +85C 01 2 x VDD2V Magnitude of differential output voltage |VOD2| VCC= 4.75 V to 5.25 V, RL= 100 , see figure 3 -40C to +85C 01

25、 2 V Change of magnitude of differential output voltage 2/ |VOD| VCC= 4.75 V to 5.25 V, RL= 100 , see figure 3 -40C to +85C 01 0.4 V Common mode 3/ output voltage VOCVCC= 4.75 V to 5.25 V, RL= 100 , see figure 3 -40C to +85C 01 3 V Change of magnitude of common mode output voltage 2/ |VOC| VCC= 4.75

26、 V to 5.25 V, RL= 100 , see figure 3 -40C to +85C 01 0.4 V Output current with power off IOVO= 6 V, VCC= 0 V -40C to +85C 01 100 A VO= -0.25 V, VCC= 0 V -100 VO= -0.25 V to 6 V, VCC= 0 V 100 Input current IIVCC= 5.25 V, VI= 5.5 V -40C to +85C 01 50 A High level input current IIHVCC= 5.25 V, VI= 2.7

27、V -40C to +85C 01 25 A Low level input current IILVCC= 5.25 V, VI= 0.5 V -40C to +85C 01 -200 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V6

28、2/12606 REV PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max Short circuit output 4/ current IOSVCC= 5.25 V, VO= 0 V -40C to +85C 01 -150 mA Supply current (both drivers) ICCVCC= 5.25 V, no load, all inputs at 0

29、 V -40C to +85C 01 65 mA Differential output delay time td(OD)VCC= 5 V, CL= 15 pF, RL= 100 , see figure 4 +25C 01 20 ns Differential output transition time tt(OD)VCC= 5 V, CL= 15 pF, RL= 100 , see figure 4 +25C 01 20 ns Output skew tsk(o) VCC= 5 V, see figure 4 +25C 01 1 typical ns 1/ Testing and ot

30、her quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric t

31、esting, product performance is assured by characterization and/or design. 2/ |VOD| and |VOC| are the changes in magnitude of VODand VOC, respectively, that occur when the input is changed from a high level to a low level or vice versa. 3/ In Standard EIA-422, VOC, which is the average of the two out

32、put voltages with respect to ground, is called output offset voltage, VOS. 4/ Output one output at a time should be shorted, and duration of the short circuit should not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND

33、MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAGE 7 Case X FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAG

34、E 8 Case X Symbol Dimensions Inches Millimeters Min Max Min Max A - 0.069 - 1.75 A1 0.004 0.010 0.10 0.25 b 0.012 0.020 0.31 0.51 c 0.005 0.010 0.13 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80 4.00 E1 0.228 0.244 5.80 6.20 e 0.050 BSC 1.27 BSC L 0.016 0.050 0.40 1.27 n 8 8 NOTES: 1. Controlling

35、dimensions are inch, millimeter dimensions are given for reference only. 2. For dimension D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end. 3. For dimension E, body width does not include interl

36、ead flash. Interlead flash shall not exceed 0.017 inch (0.43 mm) each side. 4. Falls with JEDEC MS-012 variation AA. FIGURE 1. Case outline Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE ID

37、ENT NO. 16236 DWG NO. V62/12606 REV PAGE 9 Device type 01 Case outline X Terminal number Terminal symbol 1 VCC2 1A 3 2A 4 GND 5 2Z 6 2Y 7 1Z 8 1Y FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME CO

38、LUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAGE 10 FIGURE 3. Differential and common mode output voltages. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V6

39、2/12606 REV PAGE 11 NOTES: 1. The input pulse generator has the following characteristics: ZO= 50 , PRR 500 kHz, tw= 100 ns, tr 5 ns. 2. CLincludes probe and jig capacitance. FIGURE 4. Test circuit and voltage waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

40、cense from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12606 REV PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such

41、 procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers

42、 standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufa

43、cturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or conti

44、nued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Package Top side marking Vendor part number V62/12606-01XE 01295 Reel of 2500 9638I UA9638CIDREP 1/ The vendor item drawing establishes an administrative control n

45、umber for identifying the item on the engineering documentation. 2/ For the most current package and ordering information, see the package option addendum at the end of the manufacturers data sheet. 3/ Package drawings, thermal data, and symbolization are available from the manufacturer. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-