DLA DSCC-VID-V62 03603 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 16- BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf

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1、REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-02-17 Charles F. Shaffle Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY

2、Phu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY MM DD CHECKED BY Phu H. Nguyen 02-11-05 APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC S

3、ILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03603 REV A PAGE 1 OF 10 AMSC N/A 5962-V036-09 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 2

4、1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 16-Bit D-type edge-triggered flip-flop with three-state outputs, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of

5、 identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03603 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circui

6、t function 01 SN74ACT16374Q-EP 16-Bit D-type Edge-Triggered Flip-Flop with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline Letter Number of pins JEDEC PUB 95 Package style X 48 JEDEC MO-118 Plastic Small-Outline 1.2.3 Lead finishes. The lead finishes a

7、re as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V to 7 V Input voltage range (VI)

8、 -0.5 V to VCC+0.5 V 2/ Output voltage range (VO) -0.5 V to VCC+0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Output clamp current (IOK) (VIVCC) 24 mA Continuous output current (IO) (VO= 0 V to VCC) 24 mA Continuous current through VCCor GND 260 mA Maximum power dissipation at TA= 55oC (in still

9、air) 1.2 W 3/ Storage temperature range, Tstg-65oC to 150oC _ 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under

10、 “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output ratings are observed. 3/ The maximum package power dissipation is calc

11、ulated using a junction temperature of 150oC and a broad trace length of 750 mils. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 3 1.4 Recommend

12、ed operating conditions. 4/ 5/ Supply voltage range (VCC). +4.5 V to +5.5 V 6/ Input voltage range (VIN) . +0.0 V to VCCOutput voltage range (VOUT). +0.0 V to VCCMinimum high-level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Maximum high level output current (IOH) . -16 m

13、A Maximum low level output current (IOL) . 16 mA Input transition rise or fall rate (t/v) . 0 to 10 ns/V Ambient operating temperature (TA) . -40oC to 125oC 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to

14、 the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code

15、, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical perf

16、ormance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) diagram shall be as shown in 1.2.2 and figur

17、e 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function table. The function table shall be as shown in figure 3. 3.5.4 Block diagram. The block diagram shall be as shown in figure 4. 3.5.5 Timing waveforms. The timing waveforms shall be as shown in fig

18、ure 5. _ 4/ Unused inputs should be tied to VCCthrough a pullup resistor of approximately 5 k or greater to keep them from floating. Refer to the device manufacturers application report. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The

19、manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 6/ All VCCand GND pins must be connected to the proper-voltage power supply. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SU

20、PPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions unless otherwise specified VCCTA at Device type Limits Unit Min Max25C 4.40 4.5 V -40C to +125C 4.40 25C 5.40 IOH= -50 A 5.5

21、 V -40C to +125C 5.40 25C 3.94 4.5 V -40C to +125C 3.70 25C 4.94 IOH= -16 mA 5.5 V -40C to +125C 4.70 High level output voltage VOHIOH= -24 mA 2/ 5.5 V -40C to +125C 3.85 V 25C 0.10 4.5 V -40C to +125C 0.10 25C 0.10 IOL= 50 A 5.5 V -40C to +125C 0.10 25C 0.36 4.5 V -40C to +125C 0.50 25C 0.36 IOL= 1

22、6 mA 5.5 V -40C to +125C 0.50 Low level output voltage IOL= 24 mA 2/ 5.5 V -40C to +125C 0.50 V 25C 0.10 Input current IIVI= VCCor GND 5.5 V -40C to +125C 1 A 25C 0.50 Three-state output leakage current IOZVO= VCCor GND 5.5 V -40C to +125C 10 A 25C 8 Quiescent supply current ICC VI = VCC or GND , IO

23、= 0 5.5 V -40C to +125C 160 A 25C 0.9 Quiescent supply current delta 3/ ICCOne input at 3.4 V, Other inputs at GND or VCC5.5 V -40C to +125C 1 mA Input capacitance CIVI= VCCor GND 5.0 V 25C 4.5 TYP pF Output capacitance CIOVO= VCCor GND 5.0 V 25C 12 TYP pF Output enabled 52 TYP Power dissipation cap

24、acitance per flip-flop CPDCL= 50 pF f = 1 MHz Output disabled 5.0 V 25C 01 38 TYP pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62

25、/03603 REV A PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test VCCTA at Device type Limits Unit Symbol Test conditions unless otherwise specified Min Max 25C 0 65 Clock frequency fCLOCK4/ -40C to +125C 0 65 MHz 25C 7.5 CLK low 4/ -40C to +125C 7.5 25C 4.5 Pulse duration, LE

26、 high tWCLK high 4/ -40C to +125C 4.5 ns 25C 6.5 Setup time, data before CLK tSU4/ -40C to +125C 6.5 ns 25C 1 Hold time, data after CLK tH4/ -40C to +125C 01 1 ns From(Input) To (Output) Maximum frequency fMAX4/ -40C to +125C 65 MHz 25C 5.1 10.9 tPLH 4/ -40C to +125C 5.1 13.2 25C 5.3 10.9 tPHL CLK Q

27、 4/ -40C to +125C 5.3 13.1 25C 3.7 10.5 tPZH 4/ -40C to +125C 3.7 12.7 25C 4.4 11.9 tPZL OE Q 4/ -40C to +125C 4.4 14.3 25C 5.4 9.8 tPHZ 4/ -40C to +125C 5.4 10.9 25C 4.9 9.1 Propagation delay time tPLZOE Q 4/ -40C to +125C 01 4.9 10.2 ns 1/ Testing and other quality control techniques are used to t

28、he extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by ch

29、aracterization and/or design. 2/ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. 3/ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. 4/ VCC= 4.5 V to 5.5 V Provi

30、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 6 Case X Dimensions Inches Millimeters Inches Millimeters Symbol Min Max Min Max Symbol Min Max Min Max

31、 A .110 2.79 E1 .291 .299 7.39 7.59 A1 .008 0.20 e .025 Typ 0.635 Typ b .008 .013 0.20 0.34 L .020 .040 0.51 1.02 D .620 .630 15.75 16.00 L1 .010 0.25 E .395 .420 10.03 10.67 L2 .005 .010 0.13 0.25 NOTES: 1. All linear dimensions are in inches (millimeters). 2. This case outline is subject to change

32、 without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed .006 (0.15 millimeters). 4. Fall within JEDEC MO-118. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS C

33、OLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 7 Terminal number Terminal Symbol Terminal number Terminal Symbol 1 OE 25 2CLK 2 1Q1 26 2D8 3 1Q2 27 2D7 4 GND 28 GND 5 1Q3 29 2D6 6 1Q4 30 2D5 7 VCC31 VCC8 1Q5 32 2D4 9 1Q6 33 2D3 10 GND 34 GND 11 1Q7 35 2D2 12 1Q8 36 2D1 13 2Q1

34、 37 1D8 14 2Q2 38 1D7 15 GND 39 GND 16 2Q3 40 1D6 17 2Q4 41 1D5 18 VCC42 VCC19 2Q5 43 1D4 20 2Q6 44 1D3 21 GND 45 GND 22 2Q7 46 1D2 23 2Q8 47 1D1 24 2 OE 48 1CLK FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE

35、SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 8 Inputs OE CLK D Output Q L H H L L L L H or L X Q0H X X Z L = Low H = High = Clock goes from low to high X = Irrelevant FIGURE 3. Function table. FIGURE 4. Block diagram. Provided by IHSNot for ResaleNo

36、 reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 9 Test S1 tPLH / tPHLOpen tPLZ/ tPZL2 x VCCtPHZ/ tPZHGND Notes: 1/ CL includes probe and jig capacitance. 2/ Waveform 1 is for an

37、 output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control 3/ All impulses are supplied by generators having the following charac

38、teristics: PRR 1 MHz, ZO= 50 , tr= 3 ns, tf= 3 ns. 4/ The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMB

39、US, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03603 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of

40、 electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostat

41、ic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer res

42、erves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for th

43、e item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03603-01XE 01295 SN74ACT16374QDLREP ACT16374QEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering docum

44、entation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-