DLA DSCC-VID-V62 03602 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT D-TYPE TRANSPARENT LATCH WITH 3- STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf

《DLA DSCC-VID-V62 03602 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT D-TYPE TRANSPARENT LATCH WITH 3- STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA DSCC-VID-V62 03602 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT D-TYPE TRANSPARENT LATCH WITH 3- STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf（10页珍藏版）》请在麦多课文档分享上搜索。

1、REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-02-04 Charles F. Saffle Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY P

2、hu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY MM DD CHECKED BY Phu H. Nguyen 02-11-05 APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 16-BIT D-TYPE TRANSPARENT LATCH WITH 3-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC SILICON S

3、IZE A CODE IDENT. NO. 16236 DWG NO. V62/03602 REV A PAGE 1 OF 10 AMSC N/A 5962-V029-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 2 1. SCOPE

4、1.1 Scope. This drawing documents the general requirements of a high performance 16-bit D type transparent latch with three-state outputs, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification.

5、 The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03602 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device Type Generic Circuit function 01 SN

6、74ACT16373Q-EP 16-Bit D-type transparent latch with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline Letter Number of pins JEDEC PUB 95 Package style X 48 JEDEC MO-118 Plastic small outline 1.2.3 Lead finishes. The lead finishes are as specified below o

7、r other lead finishes as provided by the device manufacturer: Finish designator Material: A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3Absolute maximum ratings 1/ Supply voltage range (VCC) -0.5 V to 7 V Input voltage range (VI) -0.5 V to VCC+0.5 V 2/

8、Output voltage range (VO) -0.5 V to VCC+0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Output clamp current (IOK) (VIVCC) 24 mA Continuous output current (IO) (VO= 0 V to VCC) 24 mA Continuous current through VCCor GND 260 mA Maximum power dissipation at TA= 55oC (in still air) 1.2 W 3/ Storage te

9、mperature range, Tstg-65oC to 150oC _ 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating

10、conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output ratings are observed. 3/ The maximum package power dissipation is calculated using a junction

11、temperature of 150oC and a broad trace length of 750 mils. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 3 1.4 Recommended operating conditions

12、4/ 5/ Supply voltage range (VCC). +4.5 V to +5.5 V 6/ Input voltage range (VIN) . +0.0 V to VCCOutput voltage range (VOUT). +0.0 V to VCCMinimum high-level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL) . 0.8 V Maximum high level output current (IOH) . -16 mA Maximum low level outpu

13、t current (IOL) . 16 mA Input transition rise or fall rate (t/v) . 0 to 10 ns/V Ambient operating temperature (TA) . -40oC to 125oC 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industrie

14、s Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, cage code or logo B. Pin 1 identif

15、ier C. ESDS identification (Optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics ar

16、e as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) diagram shall be as shown in 1.2.2 and in figure 1. 3.5.2 Block diagra

17、m. The block diagram shall be as shown in figure 2. 3.5.3 Terminal connections. The terminal connections shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall be as shown in figure 4. _ 4/ Unused inputs should be tied to VCCthrough a pullup resistor of approximately 5 k o

18、r greater to keep them from floating. Refer to the device manufacturers application report. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond

19、 the stated limits. 6/ All VCCand GND pins must be connected to the proper-voltage power supply. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 4

20、 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions unless otherwise specified VCCTA at Device type Limits Unit Min Max25C 4.40 4.5 V -40C to +125C 4.40 25C 5.40 IOH= -50 A 5.5 V -40C to +125C 5.40 25C 3.94 4.5 V -40C to +125C 3.70 25C 4.94 IOH= -16 mA 5.5 V -40C to +125

21、C 4.70 High level output voltage VOHIOH= -24 mA 2/ 5.5 V -40C to +125C 3.85 V 25C 0.10 4.5 V -40C to +125C 0.10 25C 0.10 IOL= 50 A 5.5 V -40C to +125C 0.10 25C 0.36 4.5 V -40C to +125C 0.50 25C 0.36 IOL= 16 mA 5.5 V -40C to +125C 0.50 Low level output voltage IOL= 24 mA 2/ 5.5 V -40C to +125C 0.50 V

22、 25C 0.10 Input current IIVI= VCCor GND 5.5 V -40C to +125C 1 A 25C 0.50 Three-state output leakage current IOZVO= VCCor GND 5.5 V -40C to +125C 10 A 25C 8 Quiescent supply current ICC VI = VCC or GND , IO= 0 5.5 V -40C to +125C 160 A 25C 0.9 Quiescent supply current delta 3/ ICCOne input at 3.4 V,

23、Other inputs at GND or VCC5.5 V -40C to +125C 1 mA Input capacitance CIVI= VCCor GND 5.0 V 25C 4.5 TYP pF Output capacitance CIOVO= VCCor GND 5.0 V 25C 12 TYP pF Output enabled 43 TYP Power dissipation capacitance per latch CPDCL= 50 pF f = 1 MHz Output disabled 5.0 V 25C 01 4.5 TYP pF See footnotes

24、 at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test VCCTA at

25、Device type Limits Unit Symbol Test conditions unless otherwise specified Min Max 25C 4 Pulse duration, LE high tW 4/ -40C to +125C 4 ns 25C 1 Setup time, data before LE tSU / -40C to +125C 1 ns 25C 5 Hold time, data after LE tH 4/ -40C to +125C 5 ns From (Input) To (Output) 25C 3.8 9.4 tPLH 4/ -40C

26、 to +125C 3.8 11.8 25C 3.1 9.7 tPHL D Q 4/ -40C to +125C 3.1 13 25C 4.6 10.8 tPLH 4/ -40C to +125C 4.6 13.7 25C 4.5 10.5 tPHL LE Q 4/ -40C to +125C 4.5 13 25C 3.1 9.5 tPZH 4/ -40C to +125C 3.1 13 25C 3.8 11.1 tPZL OE Q 4/ -40C to +125C 3.8 15.1 25C 5.3 9.9 tPHZ 4/ -40C to +125C 5.3 11 25C 4.3 8.7 Pr

27、opagation delay time tPLZOE Q 4/ -40C to +125C 01 4.3 9.8 ns Notes: 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and

28、all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. 3/ This is the increase in supp

29、ly current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. 4/ VCC= 4.5 V to 5.5 V Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG

30、 NO. V62/03602 REV A PAGE 6 Case X Inches Millimeters Symbol Min Max Min Max A 0.110 2.79 A1 0.008 0.20 b 0.008 0.013 0.20 0.34 D 0.620 0.630 15.75 16.00 E 0.395 0.420 10.03 10.67 E1 0.291 0.299 7.39 7.59 e 0.025 Typ 0.635 Typ L 0.020 0.040 0.51 1.02 L1 0.010 0.25 L2 0.005 0.010 0.13 0.25 FIGURE 1.

31、Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 7 Function table Inputs OE LE D Output Q L H H H L H L L L L X Q0H X X Z L = Low H =

32、 High X = Dont care FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 8 Terminal number Terminal Symbol Terminal number Ter

33、minal Symbol 1 OE 25 2LE 2 1Q1 26 2D8 3 1Q2 27 2D7 4 GND 28 GND 5 1Q3 29 2D6 6 1Q4 30 2D5 7 VCC31 VCC8 1Q5 32 2D4 9 1Q6 33 2D3 10 GND 34 GND 11 1Q7 35 2D2 12 1Q8 36 2D1 13 2Q1 37 1D8 14 2Q2 38 1D7 15 GND 39 GND 16 2Q3 40 1D6 17 2Q4 41 1D5 18 VCC42 VCC19 2Q5 43 1D4 20 2Q6 44 1D3 21 GND 45 GND 22 2Q7

34、46 1D2 23 2Q8 47 1D1 24 2 OE 48 1LE FIGURE 3. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 9 Test S1 tPLH / tPHLOpen tPLZ

35、/ tPZL2 x VCCtPHZ/ tPZHGND Notes: 1/ CL includes probe and jig capacitance. 2/ Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when di

36、sabled by the output control 3/ All impulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50 , tr= 3 ns, tf= 3 ns. 4/ The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Timing waveforms. Provided by IHSNot for ResaleNo repro

37、duction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03602 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requireme

38、nts as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and

39、marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is base

40、d on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is n

41、ot to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03602-01XE 01295 SN74ACT16373QDLREP ACT16373QEP 1/ The vendor item dra

42、wing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-