JEDEC JEP130B-2016 Guidelines for Packing and Labeling of Integrated Circuits in Unit Container Packing (Tubes Trays and Tape and Reel).pdf
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1、JEDEC PUBLICATION Guidelines for Packing and Labeling of Integrated Circuits in Unit Container Packing (Tubes, Trays, and Tape and Reel) JEP130B (Revision of JEP130A, February 2006) NOVEMBER 2016 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that h
2、as been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers
3、, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and public
4、ations are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The
5、 information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further pr
6、ocessed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the
7、 address below, or refer to www.jedec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2016 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retain
8、s the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without pe
9、rmission. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Publication No. 130B -i- GUIDELINES FOR PACKING AND LABELING OF INTEGRATED CIR
10、CUITS IN UNIT CONTAINER PACKING (TUBES, TRAYS, AND TAPE AND REEL) Contents 1 Scope 12 Terms and definitions 13 Reference documents 24 Agreement 25 Guidelines 35.1 Unit pack container packing 35.2 Intermediate packing 35.3 Date codes - for Distributors only 35.4 Intermediate container Tube, Tray, or
11、Tape and Reel). Date code: Marking on device package that usually indicates device final seal or encapsulation date. PDIP: Plastic Dual-in-line package PLCC: Plastic Leaded Chip Carrier PLCCR: Rectangular PLCC QFN (MLF): Plastic Quad Flat No-lead package (Plastic Micro Lead Frame Package) SON: Plast
12、ic Dual Flat No-lead package (Plastic Dual Micro Lead Frame Package) SOIC: Plastic Small Outline Package SSOP: Plastic Shrink Small Outline Package PSOP: Power Small Outline Plastic Package TSSOP: Plastic Thin Small Outline Package MSOP: Plastic Mini Small Outline Package QSOP: Plastic Quad Small Ou
13、tline Package PQCC: Plastic Leadless Package PQFP: Plastic Quad Flat pack Package PBGA: Plastic Ball grid Array Package JEDEC Publication No. 130B Page 2 2 Terms and definitions (contd) CDIP: Ceramic Dual-In-Line (Metal Seal) Package GDIP: Ceramic Dual-In-line (Glass Seal Package) CPGA: Ceramic Pin
14、Grid Array Package CLCC: Ceramic Leadless Chip Carrier 3 Reference documents The following documents are related reference sources. CEA 556, Outer Shipping Container Bar Code Label Standard EIA 541, Packaging Material Standards for ESD Sensitive Items CEA 624, Product Package Bar Code label Standard
15、 for Non-Retail Applications JEP95, JEDEC Registered And Standard Outlines For Solid State And Related Products JESD30, Descriptive Designation System for Semiconductor-Device Packages 4 Special Formal Agreement The formal legal agreement between the Manufacturer and the Distributor may delete, chan
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