EN 62374-2007 en Semiconductor devices - Time Dependent Dielectric Breakdown (TDDB) test for gate dielectric films《半导体器件 与时间有关的栅极介电薄膜的介质击穿(TDDB)试验》.pdf

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1、BRITISH STANDARDBS EN 62374:2007Semiconductor devices Time Dependent Dielectric Breakdown (TDDB) test for gate dielectric filmsICS 31.080.01g49g50g3g38g50g51g60g44g49g42g3g58g44g55g43g50g56g55g3g37g54g44g3g51g40g53g48g44g54g54g44g50g49g3g40g59g38g40g51g55g3g36g54g3g51g40g53g48g44g55g55g40g39g3g37g60

2、g3g38g50g51g60g53g44g42g43g55g3g47g36g58BS EN 62374:2007This British Standard was published under the authority of the Standards Policy and Strategy Committee on 31 October 2008 BSI 2008ISBN 978 0 580 54048 6National forewordThis British Standard is the UK implementation of EN 62374:2007. It is iden

3、tical to IEC 62374:2007.The UK participation in its preparation was entrusted to Technical Committee EPL/47, Semiconductors.A list of organizations represented on this committee can be obtained on request to its secretary.This publication does not purport to include all the necessary provisions of a

4、 contract. Users are responsible for its correct application.Compliance with a British Standard cannot confer immunity from legal obligations.Amendments/corrigenda issued since publicationDate CommentsEUROPEAN STANDARD EN 62374 NORME EUROPENNE EUROPISCHE NORM October 2007 CENELEC European Committee

5、for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B - 1050 Brussels 2007 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC membe

6、rs. Ref. No. EN 62374:2007 E ICS 31.080 English version Semiconductor devices - Time Dependent Dielectric Breakdown (TDDB) test for gate dielectric films (IEC 62374:2007) Dispositifs semiconductors - Essai de rupture dilectrique en fonction du temps (TDDB) pour films dilectriques de grille (CEI 6237

7、4:2007) Halbleiterbauelemente - Prfung des zeitabhngigen dielektrischen Durchbruchs (TDDB) fr dielektrische Gate-Schichten (IEC 62374:2007) This European Standard was approved by CENELEC on 2007-10-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the

8、conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member. This European Standard exists

9、in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions. CENELEC members are the national electrot

10、echnical committees of Austria, Belgium, Bulgaria, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerlan

11、d and the United Kingdom. Foreword The text of document 47/1894/FDIS, future edition 1 of IEC 62374, prepared by IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 62374 on 2007-10-01. The following dates were fixed: latest date by whic

12、h the EN has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2008-07-01 latest date by which the national standards conflicting with the EN have to be withdrawn (dow) 2010-10-01 _ Endorsement notice The text of the International Standard I

13、EC 62374:2007 was approved by CENELEC as a European Standard without any modification. _ 2 BS EN 62374:2007CONTENTS 1 2 3 4 4.1 4.2 4.3 5 5.1 5.2 5.3 5.4 6 6.1 6.2 6.3 7 Figure 2 Typical example of implementing the variance method for detecting Figure 3 Timing diagram showing the implementation of t

14、he stress interruption technique for monitoring the change in SILC (tinitshall be 5 nm) the tunnelling current has a negligible effect, so the area upper limit can be extended from 1 x 10-3cm2 to 1 x 10-1cm2. 5 Procedures 5.1 General In this section the test procedure is explained. Figure 1 shows a

15、procedure for the constant voltage stress method. 7 BS EN 62374:2007Pre-TEST Apply operating voltage Gate current measurement (Imeas) Imeas defined criterion Reject initial failure Yes Not = 0Apply stress voltage (Vstress)Record breakdown time (tbd) YesNot tmax?Stop testYesNot = t + tinterGate curre

16、nt measurement (Imeas) Imeas defined criterionIEC 114/07 Figure 1 Test flow diagram of constant voltage stress method 8 BS EN 62374:20075.2 Pre-test The pre-test is performed for identifying initial failed samples. The gate current is measured at the applied use voltage. If the measured current is l

17、arger than the defined criterion, then that sample is rejected as an initial failed sample. When obtaining the defective distribution is necessary, the CVS test without pre-test may be effective. In this case the pre-test can be omitted. 5.3 Test conditions 5.3.1 General The following test condition

18、 is recommended for the TDDB test. The sample size should be selected to provide the necessary confidence level for the application. 5.3.2 Electric field Vstressshall be decided by a trial test to get the TDDB lifetime data in a reasonable time. It is preferable to select at least 3 electric fields

19、for estimating the field acceleration factor. 5.3.3 Temperature It is preferable to select at least 3 temperatures. The use-junction temperature should be in the test temperature range for estimating the temperature acceleration factor (activation energy). 5.4 Criteria Select one of the following fa

20、ilure criteria to indicate device failure: a) Igexceeds the failure value. b) If specified Igexceeds the failure value. c) If specified Ig/Ig0exceeds the failure value. Failure value : Igor Ig, Ig/Ig0value that makes the target circuit fail. The measurement condition (temperature, electric field) fo

21、r the pass judgment should be set up at use conditions or stress conditions. The gate current or the gate current shift for failure should be established in consideration of the initial current, the measurement resolution, and the products specifications. If the failure value is not specified, use t

22、he methods d) to f) below. d) Increase in measured gate leakage oxide current For thicker oxides (tox 5 nm ) or for small area test structures the oxide often fails by a sudden increase (10X) in measured oxide stress current. Imeas 10 X Iprevious. If this condition is met the test is terminated. The

23、 value of 10X increase is a recommended value. This value could range between 2-10X for actual hard breakdown events depend on the capacitor area, thickness, structure, or process. e) Increase in current noise At a soft-breakdown event the measurement noise increases. This increase in noise can be d

24、etected by analysing the current measurement data using variance techniques. This test description assumes that the test system noise has already been determined. 9 BS EN 62374:2007In this test, six consecutive current values of Imeas(i) to Imeas(i+5) are recorded and the current noise (Imeas)2is ca

25、lculated from these values as: 45)()()(251meas512meas2meas=iiiiiIiII (2) The final value of (Imeas)2is essentially the estimator of the sample variance of five Imeasvalues. The current noise is continually calculated by adding a new current value and deleting the first value in the six-point set (i.

26、e. a sliding sample set: Imeas(i+1) to Imeas(i+5). If the current noise increases by 500X over the baseline value for at least five additional calculations, then the device is defined as having failed. The additional calculations performed past the detection of breakdown assures that the noise incre

27、ase is sustained and not a result of a random fluctuation or a transient noise increase. The test is then terminated. That value of 500X increase is a recommended value. This value could range from between 200X and 500X for actual soft breakdown events depending on capacitor area, thickness, structu

28、re, or process. It may be desirable to compensate for slowing increasing values of Imeasduring the stress due to trapping or stress-induced leakage current. In this case, the value of (Imeas)2can be calculated from the variance of five values of the difference between the Imeas(i+1) - Imeas(i) data

29、points in the six point sample as follows: 45)()1( )()1()(2meas51meas512measmeas2meas+=iIiIiIiIIiiii (3) Figure 2 illustrates a typical example of implementing the variance method for detecting breakdown. The example is for a 2,0 nm thick SiO2sample with an area of 4 10-6 cm2. More than a four-order

30、-of-magnitude increase in the current noise is observed at the onset of dielectric breakdown. Ultra-thin oxides have been observed to exhibit rapid current transients and random telegraph signals (RTS) before breakdown. Care must be taken to avoid detecting breakdown under these conditions. A techni

31、que described in 11has been shown to reduce sensitivity to RTS and other transient behaviour. Pre-characterization test A pre-characterization test obtains several baseline parameters required to successfully implement the CVS test. This test requires that the test equipment current compliance (Icom

32、p) is at least 10 times greater than Istressand that the value of Iuseis greater than the test system noise. In this test the following baseline parameters are determined from known “good” devices: i) typical values of Istressat all selected values of Vstressand Iuseat Vuse; ii) baseline values for

33、system current noise at all selected values of Vstress. 1The figures in square brackets refer to the Bibliography. 10 BS EN 62374:2007The pre-characterization test should be performed on at least 5 samples distributed across the wafer. f) Increase in low voltage stress-induced leakage current (SILC)

34、 This method monitors the increase of SILC as a function of stress time to determine when soft-breakdown has occurred. In this technique at periodic time intervals (tint), the voltage stress is interrupted and device current (Imeas) measured at low gate voltage (VSILC). The value of VSILCis typicall

35、y 1 V to 2 V. After stress interruption and before the Imeasmeasurement, a wait time (twait) should occur to allow any transients to diminish which may occur in some test systems. The tintvalue should be F x Imeas(Vg, tint ), then the device is defined as having failed. The test is terminated. Typic

36、al values of constant F are between 2 to 5. The value depends on tox, Aoxide (gate oxide area), and VSILC. Figure 3 shows block and timing diagrams describing the stress interruption technique. It has been shown that periodic stress interruption does not affect the lifetime distributions for a varie

37、ty of stress conditions. The breakdown time and pre/post breakdown ISILClevel should be recorded. Time s 0 500 1 000 1 500 2 000Gate currentA Gate current Variance of delta I Baseline Sample size = 5 tox = 2,0 nm Aoxide= 4 106cm2100 increaseVar(l) 1021031041051061071081091010101110121013101410151016

38、10171018101910201021IEC 115/07Figure 2 Typical example of implementing the variance method for detecting breakdown 11 BS EN 62374:2007Stress phaseTime IsilcmeasurementVstressVsilctinttwaitIEC 116/07Figure 3 Timing diagram showing the implementation of the stress interruption technique for monitoring

39、 the change in SILC (tinitshall be E2 E3 (MV/cm) Vg1, Vg2, Vg3(V)： stress voltage to the oxide in the case of using the Vg-model or Power law model Vg1 Vg2 Vg3(V) t1, t2, t3 (h): breakdown time when the cumulative failure reaches A1 percent. Figure 4 Graph fitted Weibull/Lognormal distribution (Weib

40、ull is recommended) 15 BS EN 62374:2007lnTimetofailureEoxVgplot or 1/Eoxt3 TuseEuse(Vuse) SlopeThe Slope symbol in case of Eoxmodel EoxVgmodel Vg1/E-model G Power-law n t2 t1 E3 E2E1(V3) (V2) (V1) EoxVgor 1/EoxIEC 118/07 Figure 5 Estimate procedure of electric acceleration factor 1 000/T (1/K) lnTim

41、etofailureArrhenius t3 Slope Eat2 t1 T1 T2 T3 IEC 119/07 Figure 6 Estimation procedure of activation energy 16 BS EN 62374:20077 Lifetime dependence on gate oxide area Revised lifetime is often used to carry out a lifetime estimation of actual products with various gate areas. To convert the test sa

42、mple lifetime with a certain gate area into an actual product lifetime with a different one, the next formula shows a simple and easy procedure, which uses a Weibull distribution parameter. Formula (10) applies only to Weibull, so only Weibull is recommended as the distribution of choice. mAATTFTTF1

43、2112= (10) where TTF1, A1is the time to failure of the test sample and its gate area; TTF2, A2is the time to failure of the actual product and its gate area; m is the shape parameter of the Weibull distribution. 17 BS EN 62374:2007Annex A (informative) Supplementary determining test condition and da

44、ta analysis A.1 Example for determining VstressThe TDDB lifetime depends on Vstress, temperature, gate-oxide thickness, structure and sample area. Lifetime, especially, strongly depends on Vstress. Figure A.1 shows the TDDB lifetime data; in this case lifetime is decided by the Power-law model. From

45、 this figure, the lifetime at 2,0 V is larger than that at 3,0 V by 80 000 times. So an adequate Vstresscondition must be chosen in order to get the TDDB lifetime data in a reasonable time . As stated above, TDDB lifetime depends not only on Vstress but also on sample structure and area. So an appro

46、priate Vstressmust be decided by a trial test in order to get the TDDB lifetime data in a reasonable time. Procedure a) Decide the period during which the CVS test data should be taken. b) Trial test. 1) Sample size is around 5 to 6 per condition. 2) Test should be done under the condition of consta

47、nt voltage and temperature. 3) The lifetime data is summarized as indicated in 6.3. 4) Decide the test condition from the data of the trial test. The lifetime of the CVS test can be estimated with the results of the trial test and the acceleration model (6.2). MeasurementTime to breakdown(arbitraryu

48、nit)101210101081061041021001,0 2,0 3,0 4,0Stress voltage V Vg1/VgPower-law IEC 120/07Junction temperature Tj= 125 C. Figure A.1 Voltage dependence of lifetime for TDDB 18 BS EN 62374:2007A.2 Typical value of acceleration factor The typical acceleration factor is given below: Eox-model ()oxaexpexpEkT

49、EATTF = (A.1) where Eoxis the electric field acceleration factor. 2,0 cm/MV to 4,0 cm/MV Ea is the activation energy. 0,5 eV (typical) 1/Eoxmodel （ should not be used for very thin oxide under 5 nm） =oxaexpexpEGkTEATTF (A.2) where G is the electric field acceleration factor. 350 MV/cm Eais the activation energy. 0,5 eV (typical) Power-law nVkTEATTFgaexp