DLA SMD-5962-94564-1994 MICROCIRCUIT DIGITAL CMOS 24-BIT GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 24位通用数字信号处理器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-94564-1994 MICROCIRCUIT DIGITAL CMOS 24-BIT GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 24位通用数字信号处理器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94564-1994 MICROCIRCUIT DIGITAL CMOS 24-BIT GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 24位通用数字信号处理器 氧化物半导体数字微型电路》.pdf（58页珍藏版）》请在麦多课文档分享上搜索。

1、SMD-5962-945 64 9999996 0060799 84T = I l l Fm/ STAU CF 4fm FMIC N/A STANXRDIZED MILITARY DRwIffi THIS DRAUING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA PREPARED BY Thomas M. Heea CHECKED BY Thomu M. H. APPf3OVED 8Y Moniu L. Podking DRAWING APFROVAL D

2、ATE 94- 04-20 RMSION LNEL MICROCIRCUIT, DIGITAL, CMOS, 24-BIT GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON IzE A IF,= 1 5962-94564 SHEEr 1 OF 67 ESC FORM 193 JUL 91 DISTRIBUTION STATEMENT A. Approved for public release; distribution is uitimitd. 5962-216-94 Provided by IHSNot for Res

3、aleNo reproduction or networking permitted without license from IHS-,-,-SID-5962-9Lt564 = 9999996 0060800 391 SIZE STANDARD1 ZED DEFENSE ELECTRONICS SUPPLY CENTER MILITARY DRAWING A DAYTON, OHIO 45444 ISIOVLEVEL 1. SCOPE 1.1 m. This drawing form a part of a one part - one part nuber docunentation sy

4、stem (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes 9 and M) and space application (device class VI, and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nimber (PIN). 1.2.1 of MIL-STD-883,

5、 “Provisions for the use of MIL-STD-883 in conjunction with conpliant non-JAN devices“. available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. Device class M microcircuits represent non-JAN class B microcircuits in accordance with When 1.2 pIw. The PIN shall be as

6、 shown in the following exanple: 5r i 94564 i i Federal R HA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) des i gna tor (see 1.2.4) (see 1.2.5) (see 1.2.3) / Draning nunber 1.2.1 RHA designator. Device class M RHA marked devices shall me

7、et the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes 9 and V RHA marked devices shall meet the A dash (-) indicates a 1.2.2

8、Device tvpe(s1. The device type(s) shall identify the circuit function as follows: Device tYDe Generic nunber Circuit function o1 56002 24-bit general purpose DSP 1.2.3 Device class desiqnator. The device class designator shall be a single letter identifying the product assurance level as follows: D

9、evice class Device requirements docunentation 5962-94564 SFEFT 2 M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certificat i on and qual if i cat i on to Mi L- 1-38535 1.2.4 Case outline(s1. The case outline(s) shall b

10、e as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Termi na 1 s Package style X CMA5 - P132 132 pin grid array 1.2.5 Lead finish. The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-38535 for classes 9 and V. designation is fo

11、r use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable Finish letter o1X1l shall not be marked on the microcircuit or its packaging. The lXI1 ni thout preference. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

12、HS-,-,-SND-5962-945b4 m b OObOOL 228 W 1.3 Absolute maximun ratings. IJ Supply voltage range (V,) Storage temperature range -65C to +15OoC Maxim power dissipation (P,) Thermal resistance Junction-to-case . See MIL-STD-1835 Current drain per pin excluding Vcc and V, . 10 nU . -0.3 V to +7.0 V . 1.50

13、U ALL input voltages . V, . 0.5 V to V, = 0.5 V 1.4 Recomnended owrating conditions. Supply voltage (Vcc) 4.75 V s V, 5 5.25 V Case operating temperature range (T,) -55C to +125OC 1.5 Digital logic testinq for device classes and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883

14、, test method 5012) XX percent 1/ 2. APPLICABLE DOCUMENTS 2.1 Govermnt specification. standards, bulletin. and handbook. Unless otherwise specified, the following specification, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications a

15、nd Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION MI LI TARY MIL-1-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS STANDARD1 ZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO

16、 45444 WISICNLML MI LI TARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Microcircuit Case Outlines. 5962-94564 SET 3 BULL ET I N MILITARY MIL-BUL-103 - List of Standardized Military Drawings (SHDs). HANDBOOK MI L ITARY MIL-HD

17、BK-780 - Standardized Military Drawings. (Copies of the specification, standards, bulletin, and handbook required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) In the event of a conflic

18、t between the text of this drawing and the references cited 2.2 Order of precedence. herein, the text of this drawing shall take precedence. - 1/ Stresses above the absolute maximun rating may cause permanent damage to the device. maximun levels may degrade performance and affect reliability. u Valu

19、es will be added when they become available. Extended operation at the Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94564 9999996 O060802 164 = 3. REQUIREMENTS 3.1 The individual item requirements for device class M shall be in accordance

20、 with 1.2.1 of MIL-STD-883, I1Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devicesIl and as specified herein. device manufacturers Quality Management (PM) plan, and as specified herein. specified in MIL-STD-883 (see 3.1 herein) for device class M and MIL-1-38535 for de

21、vice classes P and V and herein. lhe case outlinecs) shall be in accordance with 1.2.4 herein. Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-1-38535, the 3.2 Design, construction, and physical dimensions. The design, construction, and

22、physical dimensions shall be as 3.2.1 3.2.2 Terminal connections. 3.2.3 Block diagram. 3.3 Electrical wrformance characteristics and Dostirradiation parameter limits. Unless otherwise specified Case outline(s1. The terminal connections shall be as specified on figure 1. The block diagram shall be as

23、 specified on figure 2. herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test reauirements. The electrical test requirements shall be the subgroups specif

24、ied in table II. Marking for device class M shall be in The electrical tests for each subgroup are defined in table I. accordance with MIL-STD-883 (see 3.1 herein). MIL-BUL-103. 3.5 Markinq. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be ma

25、rked as Listed in Marking for device classes P and V shall be in accordance with MIL-1-38535. 3.5.1 Certification/cmliance mark. The compliance mark for device class M shall be a V8I as required in MIL-STD-883 (see 3.1 herein). in MIL-1-38535. manufacturer in order to be listed as an approved source

26、 of supply in MIL-BUL-103 (see 6.7.2 herein). classes Q and V, a certificate of compliance shall be required from a PML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.7.1 herein). The certificate of compliance submitted to DESC-EC prior to listing as an appro

27、ved source of supply for this drawing shall affirm that the manufacturers product meets, for device class M, the requirements of MIL-STD-883 (see 3.1 herein), or for device classes Q and V, the requirements of MIL-1-38535 and the requirements herein. 3.1 herein) or for device classes Q and V in MIL-

28、1-38535 shall be provided with each lot of microcircuits delivered to this drawing. The certification mark for device classes Q and V shall be a 81Q#L88 or I1Ql8 as required 3.6 Certificate of conuliance. For device class M, a certificate of compliance shall be required from a For device 3.7 Certifi

29、cate of conformance. A certificate of conformance as required for device class M in MIL-STD-883 (see 3.8 Notification of change for device class M. For device class M, notification to DESC-EC of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change

30、as defined in MIL-STD-973. 3.9 Verification and review for device class M. For device class M, DESC, DESCs agent, and the acquiring activity Offshore docunentation retain the option to review the manufacturers facility and applicable required docunentation. shall be made available onshore at the opt

31、ion of the reviewer. microcircuit group nunber 105 (see MIL-1-38535, appendix A). 3.10 Microcircuit grow assigmnt for device class M. Device class M devices covered by this drawing shall be in 4. QUALITY ASSURANCE PROVISIONS 4.1 Samling and insmction. For device class M, sampling and inspection proc

32、edures shall be in accordance with For device classes Q and V, sampling and inspection procedures shall be in accordance MIL-STD-883 (see 3.1 herein). uith MIL-1-38535 and the device manufacturers PM plan. STNDARDI ZED 5962-94564 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444

33、DESC m 1934 u 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94564 m 9999996 O060803 OTO = 2.2 -0.5 4.0 -0.5 :s. - vcc 0.8 vcc 0.6 iaracteristi STANDARD1 ZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 TA

34、BLE I. Electrical wrformance c Conditions 1/ -55C S Tc S +12SoC unless otherwise specified 4.75 V 5 V, 5 5.25 V Symbol I 5962-94564 FWISICNLML SFEET 5 Limits Unit Test Device type Group A subgroups Input h-oltage wt EXTAL-RESET, MODDRQA, MODB/IRQB, MODC/IRQC Input low vorne except_ EXTALAODA/IRQA, H

35、ODB/IRPB, MOOC/IRQC Input high voltage EXTAL 1, 2, 3 Al 1 V VIH I 1, 2, 3 Al 1 I 1, 2, 3 Al L I Input low voltage EXTAL I VIL, I 1, 2, 3 Al L 1, 2, 3 Al 1 - Input High voltage RESET 1, 2, 3 Al L I - I I Input low voltage RESET 1. 2, 3 AL 1 3.5 1 vcc Input voltageWA/E 1 I, 1 Input hvoltage_M-A/E, MOO

36、B/IRQB, IJODC/IRQC MOOB/IRQB, WC/IRQC I 1, 2, 3 AL 1 Input le- current EXTALASET, MDDRQA, I I, I V, = 5.25 V MB/IRQB, MODC/IRQC, BR, AL 1 1, 2, 3 Tri-state input current 1 ITsI /V. = 2.4 V, V, = 0.4 V V, = 5.25 V I I 1, 2, 3 AL I 2.4 I V 1, 2, 3 AL L Output high voltage I, = -0.4 mA I I v, = 4.75 v

37、I I loj I 1, 2, 3 Al I I, = 3.2 mA v, = 4.75 v Output low voltage, except HREQ, TXD I I I I I I 1. 2, 3 AL I I 0.4 Output low voltage, open I, = 6.7 mA drain output HREQ v, 4.75 v Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94564 m b 006

38、0804 T37 m STANDARD1 ZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 TABLE 1. Electrical performance characteristics. SIZE A Conitions 1/ -55C 5 T, 5 +125“C unless otherwise specified 4.75 V 5 V, 5 5.25 V f = 40 MHz V, = 5.25 V I CC-R V, = 5.25 V I ccw I CCS CW V, = 5.25 V

39、V, = 5.25 V See 4.4.1 See 4.4.1b, Vcc = 4.75 V Limits I I I I I Min I Max Test Supply current Supply current, PLL Supply current, UAIT mode - 2/ Supply current, STOP mode - 2/ Input capacitance Functional testing Unit 5962-94564 I fWlSIcNLML -ET I 6 Provided by IHSNot for ResaleNo reproduction or ne

40、tworking permitted without license from IHS-,-,-F v, = 4.75 v 2 vcc = 4.75 v See figure 3 STANDARD1 ZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-94564 A ISICNLML S-EET 7 SMD-59b2-94564 m b OOb0805 973 = TABLE I. Electrical wrformance characteristics. Test Limit

41、s Unit Min Conditions 1/ -55C S T, S +125“C unless otherwise specified 4.75 V 5 V, S 5.25 V I I I I I I I I I O I 40 1 Hz Frequency of Operation (EXTAL Pin) Al 1 9, 10, 11 1 I v, 4.75 v See figure 3 1 9, 10, 11 Al 1 Clock Input High (ET,) I/ - with PLL disabled - with PLL enabled Clock Input Low (ET

42、,) 3J - with PLL disabled - with PLL enabled I io 11.7 1 ns 10500 235.5 fis Al 1 9, 10, 11 25 II io ns 25000 I 409.6 fis Clock Cycle Time (ET,) - with PLL disabled - uith PLL enabled Instruction Cycle Time(I,) = I, = ZxT, z/ - uith PLL disabled - with PLL enabled I I Phased Lock LOOD (PLL) I l VCO f

43、requency when PLL enabled; MF * Ef See figure 3 v, = 4.75 v I 9, 10, 11 All 10 f 4/ MHz PLL external capacitor (PCAP pin to PVCC) MF * Cpcap il MF S 4 A/ HF24 v, = 4.75 v See figure 3 RESET, STOP Mode Select and Interrwt Timine IP - Delay from RESET Assertion to Address High Impedance (periodically

44、sampled, not 100% See figure 3 v, = 4.75 v 9, 10, 11 Al 1 Al 1 Al 1 Al 1 tested). I I Minimum Stabilization Ourat i on Internal Osc. External clock External clock PLL Disabled z/ PLL Disabled o/ PLL Enabled o/ 10 See figure 3 v, = 4.75 v 9, 10, 11 9, 10, Il 9, IO, 11 I I See footnotes at end of tabl

45、e. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-745b4 W b OObOBOb BOT W STANDARD1 ZED SIZE MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 FINISICNLML TABLE I. Electrical performance characteristics - Continued. 59

46、62-94564 3EET 8 Test Delay from Asynchronous - RESET Deassertion to First (Internal Reset Deassert ion) External Address Output Synchronous Reset Setup Time from RESET Deassertion to CKOUT transition #1 - Synchronous Reset Delay Time from the CKT transition #1 to the First External Address Output Mo

47、de Select Setup Time Mode Select Hold Time Minim Edge-Triggered Interrupt Request Assertion Width Minim Edge-Triggered Interrupt Request Deassertion Width - Delay from IRQA, IRQB, NMI Assertion to External Memory Access Address Out Valid Caused by First Interrupt Caused by First Interrupt Instructio

48、n Fetch Instruction Execution - Delay from IRQA, IRQB, NMI Assertion to General Purpose Transfer Output Vatic Caused by First Interrupt Instruction Execution I/ Conditions IJ -55C S T, S +125OC unless otherwise specified 4.75 V 5 V, S 5.25 V See figure 3 12 vcc = 4.75 v See figure 3 I v, = 4.75 v Se

49、e figure 3 See figure 3 See figure 3 16 I V, = 4.75 V See figure 3 16a V, = 4.75 V See figure 3 17 V, = 4.75 V See figure 3 I 18 I V, = 4.75 V I See figure 3 Limits Unit See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94564 9999996 00