DLA SMD-5962-94510 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASEABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 紫外线可擦除可程序化逻辑阵列 氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-94510 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASEABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 紫外线可擦除可程序化逻辑阵列 氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94510 REV A-2007 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASEABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 紫外线可擦除可程序化逻辑阵列 氧化物半导体数字记忆微型电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 07-04-02 Robert M. Heber REV SHET REV A A A A A SHEET 15 16 17 18 19 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFE

2、NSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Kenneth Rice COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael Frye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-04-21 MICROCIRCUIT, MEMOR

3、Y, DIGITAL, CMOS, UV ERASEABLE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94510 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E211-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

4、CUIT DRAWING SIZE A 5962-94510 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device c

5、lass V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94510 01 Q X A F

6、ederal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are

7、 marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as

8、follows: Device type Generic number Circuit function fMAX3 01 7C335 12 macrocell EPLD 50 MHz 02 7C335 12 macrocell EPLD 66 MHz 03 7C335 12 macrocell EPLD 83 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device cl

9、ass Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as

10、designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP3-T28 or GDIP4-T28 28 Dual-in-line package 1/ Y GQCC1-J28 28 “J“ lead chip carrier 1/ Z CQCC1-N28 28 Square leadless chip carrier 1/ 1.2.5 Lead finish. The lead finish is as specified in MI

11、L-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Lid shall be transparent to permit ultraviolet light erasure. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94510 D

12、EFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range - -0.5 V dc to +7.0 V dc Input voltage range- -2.0 V dc to +7.0 V dc 4/ Output voltage range applied - -0.5 V dc to +7.0 V dc 4/ Output sink

13、 current - 12 mA Thermal resistance, junction-to-case (JC) - See MIL-STD-1835 Maximum power dissipation (PD) 5/ - 1.1 W Maximum junction temperature - +175C Lead temperature (soldering, 10 seconds maximum) - +300C Data retention- 10 years (minimum) Endurance - 25 erase/write cycles (minimum) 1.4 Rec

14、ommended operating conditions. Supply voltage range (VCC)- 4.5 V dc to 5.5 V dc maximum Supply voltage (VSS) - 0.0 V dc High level input voltage (VIH)- 2.2 V dc minimum Low level input voltage (VIL)- 0.8 V dc maximum Case operating temperature range (TC)- -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Go

15、vernment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFI

16、CATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standar

17、d Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2

18、/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltages referenced to VSS. 4/ Minimum voltage is -0.6 V dc which may undershoot to -2.0 V dc for pulses of less than

19、 20 ns. Maximum output pin voltage is VCC+0.75 V dc which may overshoot to +7.0 V dc for pulses of less than 20 ns. 5/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC

20、UIT DRAWING SIZE A 5962-94510 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of thes

21、e documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addres

22、sed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 W

23、ilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Ord

24、er of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 I

25、tem requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as desc

26、ribed herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specifie

27、d in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Trut

28、h table(s). 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in screening (see 4.2 herein) or quality conformance inspection group A, C, D, or E (see 4.4 herein), the devices shall

29、be programmed by the manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.3.2 Programmed devices. The requirements for supplying programme

30、d devices shall be as specified by an attached item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply

31、 over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted witho

32、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94510 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mark

33、ed. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in

34、accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall b

35、e a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Processing EPLDS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.6.1 Erasure of EPLDS. When specified, devices shall be erased in accordance with the procedures and cha

36、racteristics specified in 4.6. 3.6.2 Programmability of EPLDS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.7. 3.6.3 Verification of erasure or programmed EPLDS. When specified, devices shall be verified as either progra

37、mmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot.

38、 3.7 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract. 3.7.1 Unprogrammed device delivered to the user. All testing shall be veri

39、fied through group A testing as defined in 3.2.3.1 and table IIA. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.7.2 Manufacturer programmed device delivered to the user. All testing requirements and quality assurance provisio

40、ns herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3.8 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the require

41、ments of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved

42、 source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.9 Certificate of conformance. A certificate of conformance

43、 as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.10 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (se

44、e 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.11 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requ

45、ired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.12 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.13 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitor. This reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect the rep