DLA SMD-5962-89742 REV B-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-11-01 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-05-16 Thomas M. Hess REV S

2、HEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Wanda L. Meadows DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS

3、AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-03-05 REVISION LE

4、VEL B SIZE A CAGE CODE 67268 5962-89742 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E331-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B

5、SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-

6、89742 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT574 Octal D-type edge-triggered flip-flop with three-state outpu

7、ts, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as sp

8、ecified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc Input clamp current (IIK) (VINVCC) . 20 mA Output clam

9、p current (IOK) (VOUTVCC) 20 mA DC output current (IOUT) (VOUT= 0.0 V to VCC) (per output pin) . 35 mA DC VCCor GND current (ICC, IGND) (per pin) 70 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) 500 mW 4/ Lead temperature (soldering, 10 seconds) . +265C Thermal res

10、istance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltag

11、es are referenced to ground. 3/ The limits for parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 8 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

12、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . 0.0 V dc to VCC

13、Output voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf) (0.1VCCto 0.9VCCor 0.9VCCto 0.1VCC) . 0 to 500 ns Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL). 0.8 V dc Maximum high level output

14、current (IOH) . -6 mA Maximum low level output current (IOL) . +6 mA 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issue

15、s of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard

16、 Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700

17、 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHN

18、OLOGY ASSOCIATION (JEDEC) JESD7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 222

19、01-2107). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 2/ U

20、nless otherwise specified, all voltages are referenced to ground. 3/ The limits for parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

21、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devic

22、es and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufact

23、urers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modificat

24、ions shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified i

25、n MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram.

26、The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are a

27、s specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in ac

28、cordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking

29、 the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535

30、to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA

31、prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with e

32、ach lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity

33、 retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

34、 DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type VCCG

35、roup A subgroups Limits Unit Min Max High level output voltage 3006 VOH11/ For all inputs affecting output under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -20 A All 4.5 V 1, 2, 3 4.4 V VOH21/ For all inputs affecting output under test VIN= VIH= 2.0 V or VIL= 0.8 V F

36、or all other inputs VIN= VCCor GND IOH= -6.0 mA All 4.5 V 1 3.98 2, 3 3.7 Low level output voltage 3007 VOL11/ For all inputs affecting output under test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOL= +20 A All 4.5 V 1, 2, 3 0.1 V VOL21/ For all inputs affecting output under

37、test VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOL= +6.0 mA All 4.5 V 1 0.26 2, 3 0.4 Input current low 3009 IILFor input under test VIN= GND For all other inputs VIN= VCCor GND All 5.5 V 1 -0.1 A 2, 3 -1.0 Input current high 3010 IIHFor input under test VIN= VCCFor all other

38、 inputs VIN= VCCor GND All 5.5 V 1 0.1 A 2, 3 1.0 Quiescent supply current, output three-state 3005 ICCZOC = GND For all other inputs VIN= VCCor GND All 5.5 V 1 8 A 2, 3 160 Quiescent supply current, output high 3005 ICCHFor all inputs, VIN= VCCor GND All 5.5 V 1 8 A 2, 3 160 Quiescent supply curren

39、t, output low 3005 ICCLFor all inputs, VIN= VCCor GND All 5.5 V 1 8 A 2, 3 160 Additional quiescent supply current ICC2/ For input under test VIN= 2.4 V or 0.5 V For all other inputs VIN= VCCor GND All 5.5 V 1 2.4 mA 2, 3 3.0 Three-state output leakage current low 3020 IOZLOC = 0.8 V or 2.0 V For al

40、l other inputs VIN= VCCor GND For output under test VOUT= GND All 5.5 V 1 -0.5 A 2, 3 -10.0 Three-state output leakage current high 3021 IOZHOC = 0.8 V or 2.0 V For all other inputs VIN= VCCor GND For output under test VOUT= GND All 5.5 V 1 0.5 A 2, 3 10.0 Input capacitance 3012 CINTC= +25C See 4.3.

41、1c All GND 4 10 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I.

42、Electrical performance characteristics Continued. Test and MIL-STD-883 test method Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max Output three-state capacitance 3012 COUTTC= +25C See 4.3.1c All 5.5 V 4 20 pF Power

43、dissipation capacitance CPD3/ TC= +25C See 4.3.1c All 5.0 V 4 93 pF Functional tests 3014 See 4.3.1d All 7, 8 Maximum clock frequency fMAX2/ CL= 50 pF minimum See figure 4 All 4.5 V 9 30 MHz 10, 11 20 Minimum high or low clock pulse width tw2/ All 4.5 V 9 16 ns 10, 11 24 Minimum high or low setup ti

44、me, nD to CLK rising tsu2/ All 4.5 V 9 12 ns 10, 11 18 Minimum high or low hold time, nD from CLK rising th2/ All 4.5 V 9, 10, 11 5 ns Propagation delay time, CLK to nQ 3003 tPLH, tPHLAll 4.5 V 9 33 ns 10, 11 50 Propagation delay time, output enable, OC to nQ 3003 tPZL, tPZHCL= 50 pF minimum RL= 1 k

45、 See figure 4 All 4.5 V 9 30 ns 10, 11 45 Propagation delay time, output disable, OC to nQ 3003 tPLZ, tPHZAll 4.5 V 9 28 ns 10, 11 42 Output transition time, nQ 3003 tTLH, tTHL 2/ CL= 50 pF minimum See figure 4 All 4.5 V 9 12 ns 10, 11 18 1/ For power supply of 5 V 10 percent, the worst case output

46、voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ Guaranteed, if not tested, to the limits specified in table I. 3/ Power dissipation capacitance (CPD) determines

47、the no load dynamic power consumption, PD(total) = CPDVCC2f + (ICCx VCC) + n(ICCx VCCx d), and the no load dynamic current consumption, IS= CPDVCCf + ICC+ n x d x ICCWhere: PD= dynamic power dissipation CPD= power dissipation capacitance of the device f = input switching frequency n = number of inpu

48、ts d = duty cycle Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89742 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines R and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OC 1D 2D 3D 4D 5D 6D 7D 8D GND CLK 8Q 7Q 6Q 5Q 4Q 3Q 2Q 1Q VCCTerminal symbol description Terminal symbol Description nD (n = 1 to 8) Data inputs OC Output enable control input (active low) nQ (n = 1