DLA SMD-5962-88520 REV F-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL D-TYPE POSITIVE EDGE TRIGGERED FLIP-FLOP MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE F8859. Add device class V criteria. Change to table I. Correct terminal connections for device type 02. Editorial changes throughout. GAP 00-01-25 Raymond Monnin B Add case outline X. Add delta limits for class V devices. Editoria
2、l changes throughout. GAP 00-07-31 Raymond Monnin C Update boilerplate to MIL-PRF-38535 requirements. Make change to VOHdelta limit in table III. JAK 01-01-10 Thomas M. Hess D Add device type 03. Add section 1.5, radiation features. Make changes to waveforms in figure 4. Add appendix A, microcircuit
3、 die. Update the boilerplate to include radiation hardness assured requirements. Editorial changes throughout. TVN 05-07-15 Thomas M. Hess E Correct wafer thickness in appendix A. LTG 07-03-08 Thomas M. Hess F Update radiation features in section 1.5. Add table IB and paragraphs 4.4.4.1 - 4.4.4.2. U
4、pdate boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 12-02-22 Thomas M. Hess REV SHEET REV F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamiso
5、n DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANC
6、ED CMOS, DUAL D-TYPE POSITIVE EDGE TRIGGERED FLIP-FLOP, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-12-03 REVISION LEVEL F SIZE A CAGE CODE 67268 5962-88520 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E201-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
7、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88520 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space applicati
8、on (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device
9、classes M and Q: 5962 - 88520 01 C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 F 88520 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (
10、see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked
11、 devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC74 Dual D-
12、type positive edge-triggered flip-flop 02 54AC11074 Dual D-type positive edge-triggered flip-flop 03 54AC74 Dual D-type positive edge-triggered flip-flop 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the d
13、evice class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 c
14、ompliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88520 DLA LAN
15、D AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or C
16、DFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack 2 CQCC1-N20 20 Leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V
17、 dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (IOUT) . 50 mA DC VCCor GND current (per pin) . 50 mA 4/ Maximum power dissipation (PD) . 500 mW Storage temp
18、erature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): Case outline X . +260C Other case outlines (except case outline X) +245C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating conditions. 2/ 3/ 6/ Suppl
19、y voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT). 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time rate (t/V): VCC= 3.6 V to 5.5 V . 0 to 8 ns/V Minimum setup time, Dn to CPn (ts): TC= +25C:
20、VCC= 3.0 V . 4.0 ns VCC= 4.5 V . 3.0 ns TC= -55C and +125C: VCC= 3.0 V . 5.0 ns VCC= 4.5 V . 4.0 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88520 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISI
21、ON LEVEL F SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued 2/ 3/ 6/ Minimum hold time, Dn to CPn (th): TC= +25C: VCC= 3.0 V . 0.5 ns VCC= 4.5 V . 0.5 ns TC= -55C and +125C: VCC= 3.0 V . 0.5 ns VCC= 4.5 V . 0.5 ns Minimum pulse width, CPn (tw): TC= +25C: VCC= 3.0 V . 5.
22、5 ns VCC= 4.5 V . 5.0 ns TC= -55C and +125C: VCC= 3.0 V . 8.0 ns VCC= 4.5 V . 5.5 ns Minimum pulse width, nCD or nSD (tw): TC= +25C: VCC= 3.0 V . 6.0 ns VCC= 4.5 V . 5.0 ns TC= -55C and +125C: VCC= 3.0 V . 8.0 ns VCC= 4.5 V . 5.5 ns Minimum recovery time, nCD or nSD to CPn (trec): TC= +25C: VCC= 3.0
23、 V . 0.5 ns VCC= 4.5 V . 0.5 ns TC= -55C and +125C: VCC= 3.0 V . 0.5 ns VCC= 4.5 V . 0.5 ns Maximum clock frequency (fMAX): TC= +25C: VCC= 3.0 V . 100 MHz VCC= 4.5 V . 140 MHz TC= -55C and +125C: VCC= 3.0 V . 100 MHz VCC= 4.5 V . 140 MHz 1.5 Radiation features. Device type 03: Maximum total dose ava
24、ilable (dose rate = 50 300 rads (Si)/s) 300 krads (Si) No SEL occurs at effective LET (see 4.4.4.2) 93 MeV-cm2/mg 7/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unl
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