DLA SMD-5962-84074 REV F-2010 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS INVERTING OCTAL BUFFER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

《DLA SMD-5962-84074 REV F-2010 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS INVERTING OCTAL BUFFER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-84074 REV F-2010 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS INVERTING OCTAL BUFFER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf（17页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendors, FSCM 18714, 27014, and 04713. Table I, Propagation delay times at VCC= 2.0 V and VCC= 6.0 V and subgroups 10 and 11 shall be guaranteed if not tested. 85-11-25 Michael A. Frye B Delete vendor CAGE 31019. Add vendor CAGE 27014 and the

2、 S and 2 case outlines. Inactivate case R and 2 for new design. Editorial changes to table I. Change drawing CAGE code to 67628. Editorial changes throughout. 89-05-22 Michael A. Frye C Add vendor CAGE F8859. Add device class V criteria. Editorial changes throughout. -les 00-01-12 Raymond Monnin D C

3、orrect data limits in Paragraph 1.3. Add case outline X. Add Table III. Editorial changes throughout. -les 00-06-20 Raymond Monnin E Correct table II. Update boilerplate to MIL-PRF-38535 requirements. jak 02-02-14 Thomas M. Hess F Update boilerplate paragraphs to current requirements of MIL-PRF-3853

4、5. MAA 10-04-19 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV F F SHEET 15 16 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil/ ST

5、ANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael Frye MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, INVERTING OCTAL BUFFER WITH THREE-STATE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-10-22 OUTPUTS, MONOLITHIC

6、 SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 84074 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E263-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

7、43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are re

8、flected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 84074 01 R X Drawing number Device type Case outline Lead finish (see 1.

9、2.2) (see 1.2.4) (see 1.2.5) For device class V: 5962 - 84074 01 V X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and

10、V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.

11、2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC240 Inverting octal buffer with 3-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as

12、 listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requ

13、irements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

14、 SIZE A 84074 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dua

15、l-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X See Figure 1 20 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/

16、3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0.5 V dc Input clamp diode current (IIK) 20 mA Output clamp diode current (IOK) 20 mA Continuous output current (IO) 35 mA Continuous current

17、through VCCor GND (per pin) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ 1.4 Recommended operating cond

18、itions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1,000 ns CC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the

19、device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +12

20、5C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

21、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbo

22、oks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF D

23、EFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents ar

24、e available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

25、 of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535

26、 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A

27、 for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.

28、2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as

29、 specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristi

30、cs and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY CENTER COLUM

31、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the

32、PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA desi

33、gnator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“

34、 as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requi

35、rements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approv

36、ed source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conforman

37、ce as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (s

38、ee 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requ

39、ired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). Provided by IHSNot

40、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditi

41、ons 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -6.0 mA VCC= 4.5 V 1 3.98 2, 3 3.7 VIN= VIHminimum or

42、VILmaximum IOH= -7.8 mA VCC= 6.0 V 1 5.48 2, 3 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= 20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= 6.0 mA VCC= 4.5 V 1 0.26 2, 3 0.4 VIN= VIHminimum or VILmaximum IOL= 7.8 mA VCC= 6.0 V 1 0.

43、26 2, 3 0.4 High level input voltage VIH 2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage VIL 2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Output leakage current IOZ VCC= 6.0 V, VOUT= VCC or GND 1 0.5 A 2, 3 10.0Quiescent supply current ICCVIN= VCC or G

44、ND VCC= 6.0 V, IOUT= 0 A 1 8.0 A 2, 3 160.0Input leakage current IINVCC= 6.0 V, VIN= VCCor GND 1 0.1 A 2, 3 1.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY C

45、ENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Input capacitance CINVIN= 0.0 V, TC= +25C

46、 See 4.4.1c 4 10.0 pF Output capacitance COUT See 4.4.1c 4 20.0 pF Power dissipation Capacitance (per flip-flop) CPDSee 4.4.1c 4 40.0 pF Functional tests See 4.4.1b 7, 8 Propagation delay time, An to Yan or Bn to YBn tPLH, tPHL 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 100 ns VCC= 4.5 V 20 VCC

47、= 6.0 V 17 TC= -55C, +125C CL= 50 pF See figure 4 VCC= 2.0 V 10, 11 150 ns VCC= 4.5 V 30 VCC= 6.0 V 26 Propagation delay time, output AENABLE or B ENABLE to YAn or YBn (Enable) tPZH, tPZL 3/ TC= +25C CL= 50 pF See figure 4 VCC= 2.0 V 9 150 ns VCC= 4.5 V 30 VCC= 6.0 V 26 TC= -55C, +125C CL= 50 pF See

48、 figure 4 VCC= 2.0 V 10, 11 225 ns VCC= 4.5 V 45 VCC= 6.0 V 38 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84074 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Tes