DLA SMD-5962-84070 REV E-2011 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS DUAL 2-BIT TRANSPARENT LATCH MONOLITHIC SILICON.pdf

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1、 - REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Convert to military drawing format. Add vendor CAGE no. 27014 to case 2. Add terminal connections for case 2 to figure 1 88-02-05 M. A. Frye C Update boilerplate to MIL-PRF-38535 requirements. - CFS 01-11-07 Thomas M. Hess D Made change to para

2、graph 3.5. Update boilerplate to MIL-PRF-38535 requirements. - LTG 05-03-18 Thomas M. Hess E Correct the expression of IOfor VOHand VOLin table I. Update boilerplate - jak 11-07-21 Thomas M. Hess Current CAGE Code is 67268 REV SHET REV SHET REV STATUS REV E E E E E E E E E E E E E OF SHEETS SHEET 1

3、2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael. A. Frye MICROCIRCUIT, DIGIT

4、AL, HIGH-SPEED CMOS, DUAL 2-BIT TRANSPARENT LATCH, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-10-05 AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 84070 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E378-11 .Provided by IHSNot for ResaleNo reproduction or netw

5、orking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcirc

6、uits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84070 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circ

7、uit function as follows: Device type Generic number Circuit function 01 54HC75 Dual 2-bit transparent latch 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-l

8、ineF GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC

9、+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current. 20 mA DC output current (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 secon

10、ds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 5/ _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless other

11、wise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. 5/ Maximum junction temperature shall not be excee

12、ded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommen

13、ded operating conditions. 1/ 2/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time: VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns Minimum setup time, data to enable (tS): 3/ At +25C: VCC= 2.0 V

14、 . 100 ns VCC= 4.5 V . 20 ns VCC= 6.0 V . 17 ns At -55C to +125C: VCC= 2.0 V . 150 ns VCC= 4.5 V . 30 ns VCC= 6.0 V . 26 ns Minimum enable pulse width (tW): 3/ At +25C: VCC= 2.0 V . 80 ns VCC= 4.5 V . 16 ns VCC= 6.0 V . 14 ns At -55C to +125C: VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC= 6.0 V . 21 n

15、s Minimum hold time, enable to data (tH): 3/ At +25C: VCC= 2.0 V . 25 ns VCC= 4.5 V . 5 ns VCC= 6.0 V . 5 ns At -55C to +125C: VCC= 2.0 V . 40 ns VCC= 4.5 V . 8 ns VCC= 6.0 V . 7 ns _ 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ The limits for the parameters specified her

16、ein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 3/ See figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVIS

17、ION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are th

18、ose cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case

19、Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Aven

20、ue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLO

21、GY ASSOCIATION (JEDEC) JESD 7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 2.3 Or

22、der of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1

23、Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manu

24、facturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may

25、make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow opt

26、ion is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The termin

27、al connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specifi

28、ed on figure 4. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance charac

29、teristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking

30、 shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all

31、 non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be

32、required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets t

33、he requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of chan

34、ge to DLA Land and Maritime-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. O

35、ffshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteris

36、tics. Test Symbol Conditions -55C TC+125C unless otherwise specified 1/ Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= 20 A VCC=2.0 V 1, 2, 3 1.9 V VCC=4.5 V 4.4 VCC=6.0 V 5.9 VIN= VIHor VILIOH= 4.0 mA VCC=4.5 V 3.7 IN= VIHor VILIOH= 5.2 mA VCC=6.0 V 5.2 Low le

37、vel output voltage VOLVIN= VIHor VILIOL= 20 A VCC=2.0 V 1, 2, 3 0.1 V VCC=4.5 V 0.1 VCC=6.0 V 0.1 VIN= VIHor VILIOL= 4.0 mA VCC=4.5 V 0.4 IN= VIHor VILIOL= 5.2 mA VCC=6.0 V 0.4 High level input voltage VIHVCC=2.0 V 1, 2, 3 1.5 V 2/ VCC=4.5 V 3.15 VCC=6.0 V 4.2 Low level input voltage VILVCC=2.0 V 1,

38、 2, 3 0.3 V 2/ VCC=4.5 V 0.9 VCC=6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC = +25C See 4.3.1c 4 10 pF Quiescent supply current ICCVCC= 6.0 V VIN= VCCor GND 1, 2, 3 80 A Input leakage current IINVCC= 6.0 V VIN= VCCor GND 1, 2, 3 1.0 A Functional tests See 4.3.1d 7 See footnotes at end of table. Pr

39、ovided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C unless otherwise specified 1/ Gro

40、up A subgroups Limits Unit Min Max Propagation delay time, data, tPHL1, tPLH1TC= +25C CL= 50 pF 10% VCC=2.0 V 9 125 ns mD to mQ 3/ See figure 4 VCC=4.5 V 25 VCC=6.0 V 24 TC= -55C and +125C CL= 50 pF 10% VCC=2.0 V 10, 11 190 ns See figure 4 VCC=4.5 V 38 VCC=6.0 V 32 Propagation delay time, data, tPHL

41、2, tPLH2TC= +25C CL= 50 pF 10% VCC=2.0 V 9 130 ns mD to mQnullnullnullnullnull3/ See figure 4 VCC=4.5 V 25 VCC=6.0 V 21 TC= -55C and +125C CL= 50 pF 10% VCC=2.0 V 10, 11 195 ns See figure 4 VCC=4.5 V 39 VCC=6.0 V 33 Propagation delay time, enable, tPHL3, tPLH3TC= +25C CL= 50 pF 10% VCC=2.0 V 9 145 n

42、s mD to mQ 3/ See figure 4 VCC=4.5 V 29 VCC=6.0 V 25 TC= -55C and +125C CL= 50 pF 10% VCC=2.0 V 10, 11 220 ns See figure 4 VCC=4.5 V 44 VCC=6.0 V 38 Propagation delay time, enable, tPHL4, tPLH4TC= +25C CL= 50 pF 10% VCC=2.0 V 9 145 ns mD to mQnullnullnullnullnull3/ See figure 4 VCC=4.5 V 29 VCC=6.0

43、V 26 TC= -55C and +125C CL= 50 pF 10% VCC=2.0 V 10, 11 220 ns See figure 4 VCC=4.5 V 44 VCC=6.0 V 38 See footnotes at end of table. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR

44、 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C unless otherwise specified 1/ Group A subgroups Limits Unit Min Max Transition time high-to-low, tTHL, tTLHTC= +25C CL= 50 pF 10% VCC=2.0 V 9 75 ns low-to-high 4/ See figure 4 VCC=4.5 V 15 VCC=6.0 V

45、13 TC= -55C and +125C CL= 50 pF 10% VCC=2.0 V 10, 11 110 ns See figure 4 VCC=4.5 V 22 VCC=6.0 V 19 1/ For a power supply of 5 V 10% the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at

46、VCC= 5.5 V and 4.5 V respectively. (The VIHvalue at 5.5 V is 3.85 V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage, and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 40 pF, determines the no load dynamic power consumptio

47、n, PD= CPDVCC2f + ICCVCC, and the no load dynamic current consumption, IS= CPDVCCf + ICC. 2/ Test not required if applied as a forcing function for VOHand VOL. 3/ For VCC= 2.0 V and 6.0 V, this parameter shall be guaranteed, if not tested, to the limits specified in table I. 4/ Transition time (tTHL

48、, tTLH), if not tested, shall be guaranteed to the specified parameters. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 84070 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol 1 1QnullnullnullnullNC 2 1D 1Qnullnullnullnull3 2D 1D4 ENABLE 3-4 2D 5 VCCENABLE 3-4 6 3D NC 7 4D VCC8 4Qnullnullnullnull3D 9 4Q 4D10 3Q 4Qnull