DLA SMD-5962-10212 REV B-2013 MICROCIRCUIT HYBRID LINEAR 64 CHANNEL ANALOG MULTIPLEXER.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Table I; sheet 5, under the Group a subgroups column added footnote 4 for the Adress input currents and Enable input current tests. Table I; sheet 6, under the Group A subgroups column added footnote 4 for all current tests. Table I; sheet 6, rem
2、oved the “Switch ON resistance outputs (pins 25, 26, 68, and 70)“ test, This test is specified on sheet 7. Table I; sheet 7, for the second “Switch ON resistance outputs (pins 25, 26, 68, and 70)“ test, symbol RDS(ON)(0-63)C removed test. Table I; sheet 7, for the second “Switch ON resistance output
3、s (pins 67 and 69, Device type 01 only)“ test, symbol RDS(ON)(32-63)Cremoved test. Table I; renumbered footnotes accordingly. -sld 12-06-12 Charles F. Saffle B Added radiation hardness assurance requirements. Updated drawing paragraphs. -sld 13-05-06 Charles F. Saffle REV SHEET REV B B B B B B B B S
4、HEET 15 16 17 18 19 20 21 22 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Greg Cecil THIS DRAWI
5、NG IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Charles F. Saffle MICROCIRCUIT, HYBRID, LINEAR, 64 CHANNEL, ANALOG MULTIPLEXER AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 11-02-04 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-10212 SHEET 1 OF 22 DSCC FORM 2233 APR
6、97 5962-E401-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-10212 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents
7、five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN
8、. The PIN shall be as shown in the following example: 5962 F 10212 01 K X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RH
9、A) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit fu
10、nction 01 MUX8507 64 channel analog multiplexer, high impedance analog input, 32 channels Voltage, 32 channels Voltage and Current 02 MUX8509 64 channel analog multiplexer, high impedance analog input 1.2.3 Device class designator. This device class designator shall be a single letter identifying th
11、e product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest relia
12、bility class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level us
13、es the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the ot
14、her classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Man
15、ufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596
16、2-10212 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 96 Ceramic quad flat pack 1
17、.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Positive supply voltage between +VEEand GND +16.5 V dc Negative supply voltage between -VEEand GND -16.5 V dc VREFto GND +16.5 V dc Digital input overvoltage range: VEN(pins 5, 6, 91, and 92) .
18、 ( GND - 4)V VA(pins 1, 3, 93, and 95). ( GND - 4)V VB(pins 2, 4, 94, and 96). ( GND - 4)V Analog input overvoltage range 35 V dc Power dissipation (PD), TC = -55nullC to +125C: Device type 01 . 99mW Device type 02 . 66 mW Thermal resistance junction-to-case (JC) . 5.5C/W 2/ Storage temperature . -6
19、5C to +150C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Positive supply voltage (+VEE) +12 V to +15 V dc 5% 3/ Negative supply voltage (-VEE) -12 V to -15 V dc 5% 3/ VREF. +5 V dc 3/ Logic low level voltage (VAL) . +0.8 V dc Logic high level voltage (VAH) .
20、 +4.0 V dc Case operating temperature range (TC) -55C to +125C 1.5 Radiation features. 4/ Maximum Total Ionizing Dose (TID) (dose rate = 50 - 300 rad(Si)/s) . 300 krad(Si) 5/ 6/ Enhanced Low Dose Rate Sensitvity (ELDRS) 150 krad(Si) 5/ Single Event Phenomenon (SEP) effective linear energy transfer (
21、LET): Single Event Latchup (SEL) Immune 5/ Single Event Upset (SEU) . 86 MeV-cm2/mg 7/ Single Event Transient (SET) 86 MeV-cm2/mg 7/ 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect re
22、liability. 2/ Based on the maximum power dissipation spread over all six die. 3/ Recommended power supply turn on sequence : +VEE, -VEE, followed by VREF. 4/ See section 4.3.5 for the manufacturers radiation hardness assurance analysis and testing. 5/ The only active element in these devices are pur
23、chased as SMD 5962F9563002V9A which assures TID, ELDRS, and SEL. 6/ The package in this drawing is a larger version of the same type (flat package) as the one in SMD 5962-95630, the lid underside is nickel plate (no gold), and RGA data shows negligible amounts of hydrogen. 7/ SEU and SET testing per
24、formed at 86 MeV-cm2/mg with no upsets or single event transients. These devices will be re-tested after design or process changes that can affect RHA response of these devices. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR
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