DLA DSCC-DWG-V62 13614-2013 MICROCIRCUIT LINEAR LOW POWER OUTPUT AMPLIFIERS MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE 18 19 20 21 22 REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.lan
2、dandmaritime.dla.mil/ Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, LOW POWER OUTPUT AMPLIFIERS, MONOLITHIC SILICON 13-07-02 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/13614 REV PAGE 1 OF 22 AMSC N/A 5962-V057-13 Provided by IHSN
3、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13614 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low power output amplifiers microc
4、ircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V6
5、2/13614 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 ADA4897-1-EP Single low power output amplifier 02 ADA4897-2-EP Dual low power output amplifier 1.2.2 Case outline(s). The case outlin
6、e(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 6 MO-178-AB Plastic small outline package Y 10 MO-187-BA Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
7、 Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13614 R
8、EV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage (VS) 11 V Common mode input voltage (VCM) . -VS 0.7 V to +VS+ 0.7 V Differential input voltage . 0.7 V Power dissipation (PD) : Device type 01 . 166.6 mW 2/ Device type 02 . 119.0 mW 2/ Storage temperature range (TSTG) -65C to +125C Lead temp
9、erature (soldering 10 seconds) +300C Junction temperature range (TJ) +150C 1.4 Recommended operating conditions. 3/ Supply voltage range (VS) -5 V to +5 V Operating free-air temperature range (TA) . -55C to +125C 1.5 Thermal characteristics. Thermal resistance, junction to ambient (JA): X package .
10、150C/W Y package . 210C/W 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” i
11、s not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ For device type 01, power dissipation (PD) = ( TJmax TA) / JA= (150 125) / 150 = 0.16666 W. For device type 02, power dissipation (PD) = ( TJmax TA) / JA= (150 125) / 210 = 0.1190 W. 3
12、/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted with
13、out license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13614 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed
14、 to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE c
15、ode, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical p
16、erformance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.
17、2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13614 REV PAGE 5 TABLE I. Electrical performa
18、nce characteristics. 1/ 2/ Test Symbol Conditions VS= 5 V, G = +1, RL= 1 k to ground, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Dynamic performance section. -3 dB bandwidth BW G = +1, VOUT= 0.02 VPP+25C 01, 02 230 typical MHz G = +1, VOUT= 2 VPP30 typical G = +2, VOUT=
19、 0.02 VPP90 typical Bandwidth for 0.1 dB flatness G = +2, VOUT= 2 VPP, RL= 100 +25C 01, 02 7 typical MHz Slew rate SR G = +2, VOUT= 6 V step +25C 01, 02 120 typical V/s Settling time to 0.1% tSG = +2, VOUT= 2 V step +25C 01, 02 45 typical ns Settling time to 0.01% tSG = +2, VOUT= 2 V step +25C 01, 0
20、2 90 typical ns Noise / harmonic performance section. Harmonic distortion SFDR VOUT= 2 VPP, fC= 100 kHz +25C 01, 02 -115 typical dBc VOUT= 2 VPP, fC= 1 MHz -93 typical VOUT= 2 VPP, fC= 2 MHz -80 typical VOUT= 2 VPP, fC= 5 MHz -61 typical Input voltage noise f = 10 Hz +25C 01, 02 2.4 typical nV / Hz
21、f = 100 kHz 1 typical Input current noise f = 10 Hz +25C 01, 02 11 typical pA / Hz f = 100 kHz 2.8 typical 0.1 Hz to 10 Hz noise G = +101, RF= 1 k, RG= 10 +25C 01, 02 99 typical nVPPSee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr
22、om IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/13614 REV PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions VS= 5 V, G = +1, RL= 1 k to ground, unless otherwise specifiedTemperature, TADevice type Limits Unit Min Ma
23、x DC performance section. Input offset voltage VIO+25C 01, 02 -500 +500 V -28 typical Input offset voltage drift VIO+25C 01, 02 0.2 typical V / C Input bias current IIB+25C 01, 02 -17 -4 A -11 typical Input bias current drift IIB+25C 01, 02 3 typical nA / C Input bias offset current IIBO+25C 01, 02
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