DLA DSCC-DWG-V62 12663-2013 MICROCIRCUIT DIGITAL-LINEAR QUAD CURRENT OUTPUT SERIAL INPUT 16 BIT DIGITAL TO ANALOG CONVERTER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ Origi
2、nal date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, DIGITAL-LINEAR, QUAD, CURRENT OUTPUT, SERIAL INPUT 16 BIT DIGITAL TO ANALOG CONVERTER, MONOLITHIC SILICON 13-03-28 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12663 REV PAGE 1 OF 13 AMSC N/A 5962-V
3、004-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12663 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance quad, curre
4、nt output, serial input 16 bit digital to analog converter microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control num
5、ber for identifying the item on the engineering documentation: V62/12663 - 01 X B Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 AD5544 Quad, current output, serial input 16 bit digital to analog c
6、onverter 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 28 MO-150-AH Small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Fini
7、sh designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12663 REV PA
8、GE 3 1.3 Absolute maximum ratings. 1/ Positive power supply (VDD) to ground (GND) . -0.3 V, +8 V Negative power supply (VSS) to GND +0.3 V, -7 V Reference voltage input (VREFx) to GND -18 V, +18 V Logic input and output to GND . -0.3 V, +8 V Voltage at current output (V(IOUTx) to GND . -0.3 V, VDD+
9、0.3 V Analog ground (AGNDx) to digital ground (DGND) . -0.3 V, +0.3 V Input current to any pin except supplies . 50 mA Power dissipation (PD) . See table I. Maximum junction temperature range (TJ) . 150C Storage temperature range (TSTG) -65C to +150C Lead temperature: Vapor phase, 60 seconds 215C In
10、frared, 15 seconds 220C 1.4 Recommended operating conditions. 2/ Positive power supply (VDD) 2.7 V to 5.5 V Operating free-air temperature range (TA) . -55C to +125C 1.5 Thermal characteristics. Thermal resistance, junction to ambient (JA) 100C/W 1/ Stresses beyond those listed under “absolute maxim
11、um rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended perio
12、ds may affect device reliability. 2/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reprod
13、uction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12663 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applicat
14、ions for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as fol
15、lows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended op
16、erating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as
17、shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Timing waveforms. The timing waveforms shall be as shown in figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND
18、MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12663 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Static performance. 3/ Resolution N 1 LSB = VREF/ 216= 153 V when VREF= 10 V -55C to +125C 01 1
19、6 Bits Relative accuracy INL -55C to +125C 01 1.5 LSB Differential nonlinearity DNL -55C to +125C 01 1.5 LSB Output leakage current IOUTData = 0x0000 +25C 01 10 nA +85C 20 Full scale gain error GFSEData = 0xFFFF -55C to +125C 01 4 mV Full scale 4/ temperature coefficient TCVFS-55C to +125C 01 1 typi
20、cal ppm/ C Feedback resistor RFBx VDD= 5 V -55C to +125C 01 4 8 k Reference input. VREFx range VREFx -55C to +125C 01 -15 +15 V Input resistance RREFx -55C to +125C 01 4 8 k Input resistance match RREFx Channel to channel -55C to +125C 01 0.35 typical % Input capacitance 4/ CREFx -55C to +125C 01 5
21、typical pF Analog output. Output current IOUTx Data = 0xFFFF -55C to +125C 01 1.25 2.5 mA Output capacitance 4/ COUTx Code dependent -55C to +125C 01 35 typical pF Logic inputs and output. Logic input low voltage VIL-55C to +125C 01 0.8 V Logic input high voltage VIH-55C to +125C 01 2.4 V Input leak
22、age current IIL-55C to +125C 01 1 A Input capacitance 4/ CIL-55C to +125C 01 10 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12663 REV P
23、AGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Logic inputs and output continued. Logic output low voltage VOLIOL= 1.6 mA -55C to +125C 01 0.4 V Logic output high voltage VOHIOH= 100 A -55C to +125C 01 4 V I
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