JEDEC JEP120-A-2000 Index of Terms and Abbreviations Defined in JEDEC Publications《JEDEC出版物中定义的术语和缩略语索引》.pdf

《JEDEC JEP120-A-2000 Index of Terms and Abbreviations Defined in JEDEC Publications《JEDEC出版物中定义的术语和缩略语索引》.pdf》由会员分享，可在线阅读，更多相关《JEDEC JEP120-A-2000 Index of Terms and Abbreviations Defined in JEDEC Publications《JEDEC出版物中定义的术语和缩略语索引》.pdf（92页珍藏版）》请在麦多课文档分享上搜索。

1、JEDEC STANDARD Index of Terms and Abbreviations Defined in JEDEC Publications JEPl20-A (Revision of JEPUO) MAY 2000 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION Electronic Industries Alliance _ STD=EIA JEPL20-A-ENGL 2000 m 3234600 Ob56614 972 m NOTICE JEDEC standards and publications contain material th

2、at has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the EIA General Counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purcha

3、sers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and pu

4、blications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications.

5、 The information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby an JEDEC standard or publication may be furth

6、er processed and ultimately become an ANSEIA standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC

7、 Solid State Technology Association, 2500 Wilson Boulevard, Arlington, VA 22201 -3834, (703)907-7560/7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2000 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge, however EIA retains the

8、 copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications or call Global Engineering Documents, USA and Canada (1-800-854-7179), Internatio

9、nal (303-397-7956) Printed in the U.S.A. All rights reserved STD-EIA JEPL20-A-ENGL 2000 3234600 0656615 809 JEDEC hblication No. 120-A INDEX OF TERMS AND ABBREVIATIONS DEFINED IN JEDEC PUBLICATIONS (Formulated under the cognizance of JC-10 Committee on Terms, Definitions, and Symbols. The concept fo

10、r this publication was approved under Council Ballot JCB-94-53.) 1 Purpose This publication provides an index of terms that are defined in certain JEDEC publications. It is intended to promote the uniform use of these terms and their definitions while reducing the proliferation of new definitions fo

11、r old terms. This publication should be used in conjunction with the latest issues of JEDEC hblication No. 104, Reference Guide to Letter Symbols for Semiconductor Devices, and ANSI/IEEE Std 100, Dictionary of Electrical and Electronics Terms. 2 How to use For ease of use, terms are arranged in stri

12、ct alphabetical order without regard to spaces or hyphenation; numerals are treated as if they were spelled out. Usually, terms are shown as they appear in the source document. An exception has been made for transistor and thyristor terms from JESD77. There, many terms are located by symbol rather t

13、han alphabetically and the same basic concept appears repeated with different adjectives. To reduce redundancy in this index, many terms taken from JESD77 are shown with the following adjectives removed: ac, collector- base, collector- emitter, common-base, common-collector, common-drain, common-emi

14、tter, common-source, dc, emitter- base, large-signal, open-circuit, short-circuit, small-signal, static, etc. After each term, the JEDEC publication and clause (section) or subclause (subsection) is shown where the definition, and, in many cases, the abbreviation or symbol for the term may be found.

15、 Titles of all referenced documents are given in the back of this publication. When more than one reference is cited for a term, users are cautioned to use the proper referenced document for the definition to be applied for any specific device. Note that definitions contained in an informative annex

16、 (appendix) are not a formal part of a standard but are included for information only. -1- STD-EIA JEPL20-A-ENGL 2000 II 3234600 065bbLb 745 W JEDEC hblication No. 120-A Page 1 Term Document Clause A see acceleration factor A. . A or a . see anode terminal abbreviation JESD77-B . 1.1 abbreviation JE

17、SD99-A . 2.1.1 absolute accuracy error JESD99-A . 2.5.2.4 absolute maximum rating JESD77-B . 2.1 ABTxxx series . acceleration factor (A) . JEP122 . 3 acceptance inspection JESD16-A . 5.1 acceptance procedure EIA-554 . 3.2 accept number (c) . JESD1 6-A . 5.2 access time . JESD1 OO-B . 2.2 ac controll

18、er JESD14 . 3.1 accumulation layer see layer, accumulation accumulator . JESD1 00-8 . 1 accuracy EIA-557-A . A accuracy JEP132 . B accuracy, long-term . see instability, long-term ac terminal . JESD14 . 5.1 ac test . JESD12-1B . 3 ac test . JESD99-A . 1.2 activation energy . JEP122 . 3 active circui

19、t element see circuit element, active active component (of a hybrid integrated circuit) see component, active (of a .) active desiccant . active device active hybrid film integrated circuit see integrated circuit, active hybrid film active-pulldown output JESD99-A . 2.2.6 active-pullup output . JESD

20、99-A . 2.2.6 active substrate . see substrate, active actual time to fail . JESD61 . 4 ac unbalance voltage JESD99-A . 2.4.5 ac . see also “How to Use” ADC . see analog-to-digital converter A/D converter (ADC) . see analog-to-digital converter address . JESD1 OO-B . 1 address data inpuVoutput (ADQ)

21、JESD21-C address inputs (A) . JESD21-C . 2.1.2 address latch enable (AL) . JESD21-C . 2.1.4 address register JESD1 00-B . 1 administrative problem JESD671-A . 5 ADQ see address data inpuoutput advance-information document . JEP103-A affected customer JESD48 . 3 AGC range see automatic gain control r

22、ange air ionizer JESD625-A . 4 . see address inputs . JESD54 J-STD-033 5 JESD99-A . 1.2 - STD-EIA JEPL20-A-ENGL 2000 3234600 Ob5bbL7 bL = JEDEC miblication No. 120-A Page 2 Document Clause Term AL see address latch enable alignment mark . . see registration mark “A limit . JESD99-A . 2.2.2 “A limit

23、high-level input voltage see high-level input voltage, “A limit “A” limit low-level input voltage . see low-level input voltage, ”A limit ALU . see arithmetic and logic unit ambient temperature . JESD61 . 4 ambient temperature . JESD77-B . 2.2 ambient temperature EIA-323 . A-mode J-STD-035 2.1 analo

24、g gate . JESD99-A . 2.5.1 analog integrated circuit . see integrated circuit, analog analog microcircuit see microcircuit, analog analog resolution (of a linear or nonlinear ADC) . see resolution, analog (of a .) analog resolution (of a linear or nonlinear DAC) . see resolution, analog (of a .) anal

25、og settling time (of a DAC) . see settling time, analog (of a .) analog signal . see signal, analog analog-to-digital converter (ADC) JESD99-A . 2.5.2.1 analog-to-digital processor JESD99-A . 2.5.2.1 analysis of variance . . . . see anova analyst . JESD38 . 1.4a angular luminous intensity JESD77-B .

26、 5.3.2 anode EIA-282-A . 1 .I anode JESD77-B . 2.1 anode-cathode on-state voltage . JESD77-B . 6.2.2 anode-cathode voltage . JESD77-B . 6.1 .I anode current JESD77-B . 2.1 anode (of a current-regulator diode) . JESD77-B . 3.5.1 anode-side junction-to-case thermal resistance . JESD77-B . 6.1.2 anode-

27、side (partial) junction-to-case thermal resistance . . JESD77-B . 6.1.2 anode terminal . EIA-282-A . 1.1 anode terminal (A, a) . JESD77-B . 6.2.1 anode terminal (A, a) . JESD77-B . 2.1 anode terminal (of a unidirectional diode thyristor) (A) . JESD77-B . 6.1 .I anode terminal (of a unidirectional tr

28、iode thyristor) (A) . JESD77-B . 6.1.1 anode voltage (of a unidirectional diode thyristor) see anode-cathode voltage anode voltage (of a unidirectional triode thyristor) see anode-cathode voltage anova JEP132 . B ANOVA see variance components analysis antistatic material JESD625-A . 4 antistatic pro

29、perty EIA-541 . 2.2.1 AOQ see average outgoing quality apparent activation energy JEP122 . 3 application-specific integrated circuit (ASIC) JESD99-A . 1.2 approved customer agent . JESD48 . 3 approved supplier agent . JESD48 . 3 area (a) JEPI 19 . 4.10 arithmetic and logic unit (ALU) . JESDl00-B . 1

30、 D (3) STD*EIA JEPL20-A-EMGL 2000 m 323+600 0656618 518 m JEDEC hblication No . 120-A Page 3 Term Document Clause arithmetic unit JESD100-B . 1 array density . JESDI2-1 B . 4 array density (of a gate array) . JESD99-A . 1.3 array, logic JESD99-A . 1.2 ART . see auto-load read transfer artificial int

31、elligence . JEPI 32 . B artwork JESD99-A . 1.2 ASIC see programmable application specific ASIC see application-specific integrated assembly, microelectronic . JESD99-A . 1.2 asymmetrical gate turn-off thyristor . see thyristor, (asymmetrical) gate turn- asymmetrical reverse-blocking triode thyristor

32、 see thyristor, reverse-blocking triode, asymmetry, full-scale (of a DAC with bipolar analog range) . JESD99-A . 2.5.2.2 asynchronous circuit . JESD12-1 B . 3 ATTF . see actual time to fail attribute data . EIA-557-A . A audit EIA-554 . 3.3 audit EIA-557-A . A audit JESD659-A . 4.1 AUP . JEP130 . 2

33、auto-load read transfer (ART) . JESD21 -C . 2.6.13 auto-load write transfer (Am) JESD21-C . 2.6.9 automatic gain control range (AGC range) . JESD99-A . 2.4.2 auxiliary terminal . JESD14 . 5.4 available gates JESD12-1 B . 4 available gates (in a gate array) JESD99-A . 1 . 3 avalanche diode operating

34、in the IMPATT mode see IMPATT diode avalanche diode operating in the TRAPATT mode . see TRAPATT diode avalanche-junction transient voltage suppressor JESD77-B . 7.1.1 avalanche luminescent diode JESD77-B . 5.3.1 avalanche photodiode . see photodiode, avalanche average charge-transfer efficiency JESD

35、99-A . 2.7.3 device circuit associative memory . . JESD100-B 1 Off asymmetrical asynchronous circuit . JESD99-A . 1 . 2 attribute memory select (RG) . JESD21-C . 2.8.4 autodoping JESD99-A . 1.2 average . EIA-557-A . A average current . EIA-282-A . 1.2 average current . JESD77-B . 2.1 average dark cu

36、rrent density JESD99-A . 2.7.5 average forward voltage EIA-282-A . 5.6.6.1 average noise factor . JESD77-B . 2.2 average noise factor . JESD99-A . 2.4.10 average noise figure . JESD77-B . 2.2 average noise figure . JESD99-A . 2.4.10 STD.EIA JEPL20-A-ENGL 2000 3234600 0656637 454 JEDEC Publication No

37、 . 120-A Page 4 Clause Term Document average outgoing quality (AOQ) JESD16-A . 5.3 average power dissipation JESD77-B . 7.1.2 average pulse duration . JESD77-B . 2.2 average rectified output current JESD77-B . 3.1.2 average reverse current EIA-282-A . 5.6.3.1 average voltage EIA-282-A . 1.2 average

38、voltage JESD77-B . 2.1 AWT see auto-load write transfer axis of measurement . JESD77-B . 5.3.1 B see byte B orb . see base B or b . see base terminal b see bit BA . see bank address background charge . JESD99-A . 2.7.2 back-side substrate view area J-STD-035 2.3 back sputtering see sputter cleaning

39、backward diode . JESD77-B . 3.3.1 backward traceability JESD50 . 4.4 balanced amplifier . JESD99-A . 2.4.1 ball bond . JESD22-B116 . 2.1 ball contact see contact, bump ball grid array (BGA) . JESD21-C . 2.7.1 ball-grid array (BGA) . JESD95-1 . 14.2 bandwidth (BW) . JESD99-A . 2.4.3 bandwidth, maximu

40、m output swing JESD99-A . 2.4.3 bandwidth, unity gain JESD99-A . 2.4.3 bank address (BA) JESD21-C . 2.1.6 bank skew . JESD65 . 3 bank skew time . see skew (time), bank barrier diode see diode, barrier base JESD77- B . 4.1.1 base current JESD77-B . 4.1.2 base cutoff current JESD77-B . 4.1.2 base (of

41、a package) JESD99-A . 1.2 base-1 peak voltage JESD77-B . 4.2.2 base plane EIA-308-A . 4.4 base plane JESD95-1 . 4.2.1 base region . JESD77-B . 4.2.1 base region, functional JESD77-B . 4.1 . 1 base region, (physical) JESD77-B . 4.1 .I base supply voltage JESD77-B . 4.1.2 average rectified output curr

42、ent EIA-282-A . 1.2 axial luminous intensity . JESD77-B . 5.3.2 B BXXX JESD21-C . 2.4.3 ball bond . see bond, ball base (B, b) . JESD1 0 . 1.2 STD=EIA JEPL20-A-ENGL 2000 3234600 Ob56620 L7b 111 JEDEC hblication No. 120-A Page 5 Document Clause base terminal (B, b) . JESD77-B . 4.1.1 base terminal (B

43、) . JESD77-B . 4.2.1 base . see also “How to Use” basic dimension JESD95-1 . 2.2 battery voltage detect (BD) . JESD21-C . 2.8.1 baud JESDl00-B . 1 BBD . see bucket-brigade device BCxxx series . JESD54 . 2 BCCD see bulk-channel charge-coupled BCCD see buried-channel charge-coupled BCD . see bipolar-a

44、nd-CMOS-and-DMOS BD . see battery voltage detect BDRAM . see burst DRAM beam lead . JESD99-A . 1.2 beam-lead chip see chip, beam-lead behavioral description . JESD12-1 B . 3 behavioral description . JESD99-A . 1.3 benchmark EIA-599-A . 4 best-straight-line linearity error (of a linear and adjustable

45、 ADC) . see linearity error, best-straight-line best-straight-line linearity error (of a linear and adjustable DAC) . see linearity error, best-straight-line BG . see byte mode enable BGA . see ball-grid array bias . JEP132 . B bias . JESD37 . 3.1.7 bias charge . JESD99-A . 2.7.2 BiCMOS . see bipola

46、r-and-CMOS BiCMOS series JESD54 . 2 BiCMOS series JESD55 . 2 bidirectional diode thyristor . see thyristor, bidirectional diode bidirectional triode thyristor . see thyristor, bidirectional triode bidirectional TSPD JESD66 . 3.2.5 BiFET see bipolar-and-FET BiMOS . see bipolar-and-MOS binary digit .

47、see bit binary integrated circuit . see integrated circuit, binary binary microcircuit . see microcircuit, binary binomial distribution EIA-557-A . A bipolar-and-CMOS-and-DMOS (BCD) technology JESD99-A . 1.2 bipolar-and-CMOS (BiCMOS) technology . JESD99-A . 1.2 bipolar-and-MOS (BiMOS) technology JES

48、D99-A . 1.2 bipolar junction transistor see junction transistor, (bipolar) bipolar output JESD99-A . 2.2.6 device device (of a .) (of a .) bidirectional thyristor surge protective device . JESD77-B . 7.2.1 bipolar-and-FET (BiFET) technology JESD99-A . 1.2 bipolar technology . JESD77-B . 2.1 JEDEC Pu

49、blication No . 120-A Page 6 Term Document Clause bipolar technology . JESD99-A . 1.2 bipolar transistor . JESD77-B . 4.1.1 bipolar transistor . see transistor, bipolar bistable logic function JESD99-A . 2.3.1 bit (b) . JESD100-B . 1 bit plane JESD21 -C . 2.5.1 bit slice JESD100-B . 1 bit-slice processor . JESDl OO-B . 1 bit wide JESD21-C . 2.5.2 bit-wide device JESDlOO-B . 1 blackbody JESD51-1 . A blackbody JESD77-B . 5.1.1 blank terminal see no (internal) connection “B” limit JESD99-A . 2.2.2 “B limit high-level input voltage se