DLA SMD-5962-98542 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 3 3 VOLT 16-BIT EDGE-TRIGGERED D-TYPE FLIP FLOP WITH BUS HOLD EQUIVALENT 22 OHMS SERIES OUTPUT RESISTORS THL.pdf
《DLA SMD-5962-98542 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 3 3 VOLT 16-BIT EDGE-TRIGGERED D-TYPE FLIP FLOP WITH BUS HOLD EQUIVALENT 22 OHMS SERIES OUTPUT RESISTORS THL.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-98542 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 3 3 VOLT 16-BIT EDGE-TRIGGERED D-TYPE FLIP FLOP WITH BUS HOLD EQUIVALENT 22 OHMS SERIES OUTPUT RESISTORS THL.pdf(19页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add VINtest conditions for VOHand VOLin table I. Add table III, delta limits. Update boilerplate to the MIL-PRF-38535 requirements. Editorial changes throughout. jak 03-05-02 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-3
2、8535 requirements. - LTG 10-11-22 Thomas M. Hess REV SHET REV B B B B SHEET 15 16 17 18 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MIC
3、ROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Charles F. Saffle, Jr. APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3 VOLT 16-BIT EDGE-TRIGGERED D-TYPE FLIP FLOP WITH BUS HOLD, EQUI
4、VALENT 22 SERIES OUTPUT RESISTORS WITH THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 98-03-25 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-98542 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E060-11 Provided by IHSNot for ResaleNo reproduction or networking permi
5、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classe
6、s Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the f
7、ollowing example: 5962 - 98542 01 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-
8、PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device typ
9、e(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LVTH162374 3.3 V 16-bit edge-triggered D-type flip-flop with bus hold, equivalent 22 series resistors, three-state outputs, and TTL compatible inputs 1.2.3 Device class designator. The device class design
10、ator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification
11、and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDFP1-F48 48 Flat pack1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes
12、 Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1
13、.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +4.6 V dc DC input voltage range (VIN) -0.5 V dc to +7.0 V dc 4/ Voltage range applied to any output in the high or power-off state (VOUT) . -0.5 V dc to 7.0 V dc 4/ Current into any output in the low state (IOL) 30 mA Cur
14、rent into any output in the high state (IOH) 30 mA 5/ Input clamp current (IIK) (VINVCC. 6/ The maximum package power dissipation is calculated using a junction temperature at 150C and a board trace length of 750 mils. 7/ Unused inputs must be held high or low to prevent them from floating. Provided
15、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-98542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, an
16、d handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Cir
17、cuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780
18、 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between th
19、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for
20、device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for devi
21、ce class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and
22、V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3
23、.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce test circuit and waveforms. The ground bounce test circuit and waveforms shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as sp
24、ecified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperatur
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