DLA SMD-5962-95661 REV D-2009 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-95661 REV D-2009 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-95661 REV D-2009 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(26页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R314-97 97-10-22 Monica L. Poelking B Changes in accordance with NOR 5962-R011-99 98-10-29 Monica L. Poelking C Update boilerplate to MIL-PRF-38535 and updated appendix A. Editorial changes throughout. - tmh 00
2、-08-10 Monica L. Poelking D Correct the radiation features in section 1.5 and paragraph 4.4.4.1. Update the boilerplate paragraphs as requirement of current MIL-PRF-38535. - MAA 09-05-04 Thomas M. Hess REV SHET REV D D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV D D D D D
3、 D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPRO
4、VED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-12-20 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 59
5、62-95661 SHEET 1 OF 25 DSCC FORM 2233 APR 97 5962-E282-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234
6、 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). W
7、hen available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 95661 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designato
8、r (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA
9、levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 ACTS373 Radiation hardened SOS, advanced CMOS, octal transparent latch w
10、ith three-state outputs TTL compatible inputs 02 ACTS373-02 1/ Radiation hardened SOS, advanced CMOS, octal transparent latch with three-state outputs TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follow
11、s: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outlin
12、e(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R CDIP2-T20 20 Dual-in-line package X CDFP4-F20 20 Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, append
13、ix A for device class M. _ 1/ Device type -02 is the same as device type -01 except that the device type -02 products are manufactured at an overseas wafer foundry. Device type -02 is used to positively identify, by marketing part number and by brand of the actual device, material that is supplied b
14、y an overseas foundry.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings
15、. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input current, any one input (IIN). 10 mA DC output current, any one output (IOUT) 50 mA Storage temperature range (TSTG
16、) . -65C to +150C Lead temperature (soldering, 10 seconds). +265C Thermal resistance, junction-to-case (JC): Case outline R . 24C/W Case outline X 28C/W Thermal resistance, junction-to-ambient (JA): Case outline R . 72C/W Case outline X 107C/W Junction temperature (TJ) +175C Maximum package power di
17、ssipation at TA= +125C (PD): 4/ Case outline R . 0.69 W Case outline X 0.47 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0 V dc to VCCMaximum low level input voltage (VIL) 0.8
18、 V Minimum high level input voltage (VIH). VCC/2 Case operating temperature range (TC). -55C to +125C Maximum input rise and fall time at VCC= 4.5 V (tr, tf) 10 ns/V 1.5 Radiation features. Total dose available (Dose rate = 50 300 rads(Si)/s) . 3 x 105Rads (Si) Single event phenomenon (SEP) effectiv
19、e linear energy threshold (LET) no upsets (see 4.4.4.4). 100 MeV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . 1 x 1011Rads (Si)/s 5/ Dose rate induced latch-up None 5/ Dose rate survivability . 1 x 1012Rads (Si)/s 5/ _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the de
20、vice. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C
21、 unless otherwise noted. 4/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA) at the following rate: Case R . 13.9 mW/C Case X 9.3 mW/C 5/ Guaranteed by design or process but not tested. Provided by IHSNot for ResaleNo repro
22、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The fol
23、lowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing,
24、 General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcirc
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