DLA SMD-5962-95659 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS DUAL 4-INPUT NAND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON《互补金属氧化物半导体数字的双重4输入与非晶体管兼容输入硅单片电路.pdf

《DLA SMD-5962-95659 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS DUAL 4-INPUT NAND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON《互补金属氧化物半导体数字的双重4输入与非晶体管兼容输入硅单片电路.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95659 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS DUAL 4-INPUT NAND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON《互补金属氧化物半导体数字的双重4输入与非晶体管兼容输入硅单片电路.pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、REVISIONSLTR DESCRIPTION DATE (YR-MO-DA) APPROVEDA Changes in accordance with NOR 5962-R312-97 97-10-22 Monica L. PoelkingB Changes in accordance with NOR 5962-R010-9998-10-29 Monica L. PoelkingC Update boilerplate to MIL-PRF-38535 and updated appendix A. Editorialchanges throughout. - tmh00-08-10 M

2、onica L. PoelkingREVSHEETREV CCCCCCCCSHEET 15 16 17 18 19 20 21 22REV STATUS REV CCCCCCCCCCCCCCOF SHETS SHET 123456789101121314PMIC N/A PREPARED BY Joseph A. KerbyDEFENSE SUPPLY CENTER COLUMBUSSTANDARDMICROCIRCUITDRAWINGCHECKED BYThanh V. NguyenCOLUMBUS, OHIO 43216THIS DRAWING IS AVAILABLEFOR USE BY

3、 ALLDEPARTMENTSAPPROVED BYMonica L. PoelkingAND AGENCIES OF THEDEPARTMENT OF DEFENSEDRAWING APPROVAL DATE95-12-26MICROCIRCUIT, DIGITAL, RADIATIONHARDENED, ADVANCED CMOS, DUAL 4-INPUTNAND GATE, TTL COMPATIBLE INPUTS,MONOLITHIC SILICONAMSC N/AREVISION LEVELCSIZEACAGE CODE672685962-95659SHEET1 OF 22DSC

4、C FORM 2233APR 97 5962-E379-00DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA5962-95659DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 432

5、16-5000REVISION LEVELCSHEET2DSCC FORM 2234APR 971. SCOPE1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q andM) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in t

6、hePart or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in thePIN.1.2 PIN. The PIN is as shown in the following example:5962 F 95659 01 V X CG0DG0D G0DG0D G0DG0DG0DG0D G0DG0D G0DG0DG0DG0D G0D G0D G0D G0DFederal RHA Device Device Case Le

7、ad stock class designator type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3)/ Drawing number1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels andare marked with the appropriate RHA des

8、ignator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix Aspecified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:Device type Generic number Cir

9、cuit function01 ACTS20 Radiation hardened SOS, advanced CMOS,dual 4-input NAND gate, TTL compatibleinputs02 ACTS20-02 1/ Radiation hardened SOS, advanced CMOS,dual 4-input NAND gate, TTL compatibleinputs1.2.3 Device class designator. The device class designator is a single letter identifying the pro

10、duct assurance level asfollows:Device class Device requirements documentationM Vendor self-certification to the requirements for MIL-STD-883 compliant,non-JAN class level B microcircuits in accordance with MIL-PRF-38535,appendix AQ or V Certification and qualification to MIL-PRF-385351.2.4 Case outl

11、ine(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:Outline letter Descriptive designator Terminals Package styleC CDIP2-T14 14 dual-in-line packageX CDFP3-F14 14 flat package1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MI

12、L-PRF-38535,appendix A for device class M.1/ Device type -02 is the same as device type -01 except that the device type -02 products are manufactured at an overseaswafer foundry. Device type -02 is used to positively identify, by marketing part number and by brand of the actual device,material that

13、is supplied by an overseas foundry.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA5962-95659DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000REVISION LEVELCSHEET3DSCC FORM 2234APR 971.3 Absolute maximum ratings

14、. 1/ 2/ 3/Supply voltage range (VCC). -0.5 V dc to +7.0 V dcDC input voltage range (VIN). -0.5 V dc to VCC + 0.5 V dcDC output voltage range (VOUT) -0.5 V dc to VCC + 0.5 V dcDC input current, any one input (IIN) . 10 mADC output current, any one output (IOUT) 50 mAStorage temperature range (TSTG) -

15、65C to +150CLead temperature (soldering, 10 seconds). +265CThermal resistance, junction-to-case (JC):Case outline C 24C/WCase outline X 30C/WThermal resistance, junction-to-ambient (JA):Case outline C 74C/WCase outline X 116C/WJunction temperature (TJ) . +175CMaximum package power dissipation at TA

16、= +125C (PD): 4/Case outline C 0.68 WCase outline X 0.43 W1.4 Recommended operating conditions. 2/ 3/Supply voltage range (VCC). +4.5 V dc to +5.5 V dcInput voltage range (VIN). +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMaximum low level input voltage (VIL). 0.8 VMinimum high lev

17、el input voltage (VIH) VCC/2Case operating temperature range (TC) -55C to +125CMaximum input rise and fall time at VCC = 4.5 V (tr, tf) 10 ns/VRadiation features:Total dose 3 x 105Rads (Si)Single event phenomenon (SEP) effectivelinear energy threshold (LET) no upsets (see 4.4.4.4) 100 MeV/(cm2/mg) 5

18、/Dose rate upset (20 ns pulse) . 1 x 1011Rads (Si)/s 5/Latch-up None 5/Dose rate survivability . 1 x 1012Rads (Si)/s 5/2. APPLICABLE DOCUMENTS2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form apart of this drawing to the extent specifi

19、ed herein. Unless otherwise specified, the issues of these documents are those listed inthe issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in thesolicitation.SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-38535 - Integrated Circuits, Manufa

20、cturing, General Specification for.1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.2/ Unless otherwise specified, all voltages are referenced to GND.3/ The limits for the pa

21、rameters specified herein shall apply over the full specified VCC range and case temperature range of -55C to +125C unless otherwise noted.4/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating isbased on JA) at the following rate:Case C 13.5

22、 mW/CCase X 8.6 mW/C5/ Guaranteed by design or process but not tested.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA5962-95659DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000REVISION LEVELCSHEET4DSCC FORM 223

23、4APR 97STANDARDSDEPARTMENT OF DEFENSEMIL-STD-883 - Test Method Standard Microcircuits.MIL-STD-973 - Configuration Management.MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines.HANDBOOKSDEPARTMENT OF DEFENSEMIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs).MIL-HDBK-780 - Stan

24、dard Microcircuit Drawings.(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the StandardizationDocument Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2.2 Order of precedence. In the event of a conflict between the text

25、of this drawing and the references cited herein, the textof this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless aspecific exemption has been obtained.3. REQUIREMENTS3.1 Item requirements. The individual item requirements for device clas

26、ses Q and V shall be in accordance withMIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. Themodification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements fordevice class M sha

27、ll be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specifiedherein.3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.3.2 Design, construction, and physical dimensions. The design, construction, and physical dim

28、ensions shall be as specifiedin MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.3.2.2 Terminal connections. The terminal connections shall be as specified on

29、 figure 1.3.2.3 Truth table. The truth table shall be as specified on figure 2.3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.3.2.5 Switching waveform and test circuit. The switching waveforms and test circuits shall be as specified on figure 4. 3.2.6 Radiation exposure cir

30、cuit. The radiation test connections shall be as specified in table III herein.3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, theelectrical performance characteristics and postirradiation parameter limits are as specified in table

31、I and shall apply over the fullcase operating temperature range.3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electricaltests for each subgroup are defined in table I.3.5 Marking. The part shall be marked with the PIN listed in 1

32、.2 herein. In addition, the manufacturers PIN may also bemarked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to spacelimitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the

33、RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“

34、 or “Q“ as required inMIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA5962-95659DEFENSE SUPPLY CENTER COLUM

35、BUSCOLUMBUS, OHIO 43216-5000REVISION LEVELCSHEET5DSCC FORM 2234APR 973.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device clas

36、s M, a certificate ofcompliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for thisdrawing shall affirm that the man

37、ufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V inMIL-PRF-38535 or for

38、 device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits deliveredto this drawing.3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2herein) involving devices acquired to this drawing is require

39、d for any change as defined in MIL-STD-973.3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retainthe option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be madeavailable onsh

40、ore at the option of the reviewer.3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be inmicrocircuit group number 36 (see MIL-PRF-38535, appendix A).4. QUALITY ASSURANCE PROVISIONS4.1 Sampling and inspection. For device classes Q and V, samp

41、ling and inspection procedures shall be in accordance withMIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM planshall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shal

42、l bein accordance with MIL-PRF-38535, appendix A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conductedon all devices prior to qualification and technology conformance inspection. For device class M, screening shall be inaccordance with

43、 method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.4.2.1 Additional criteria for device class M.a. Burn-in test, method 1015 of MIL-STD-883.(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document

44、 revisionlevel control and shall be made available to the preparing or acquiring activity upon request. The test circuit shallspecify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified intest method 1015.(2) TA = +125C, minimum.b. Interim and f

45、inal electrical test parameters shall be as specified in table IIA herein.4.2.2 Additional criteria for device classes Q and V.a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in thedevice manufacturers QM plan in accordance with MIL-P

46、RF-38535. The burn-in test circuit shall be maintained underdocument revision level control of the device manufacturers Technology Review Board (TRB) in accordance withMIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shallspecify the inp

47、uts, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in testmethod 1015 of MIL-STD-883.b. Interim and final electrical test parameters shall be as specified in table IIA herein.c. Additional screening for device class V beyond the requirements of device

48、 class Q shall be as specified inMIL-PRF-38535, appendix B.4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be inaccordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein forgroups

49、 A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA5962-95659DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000REVISION LEVELCSHEET6DSCC FORM 2234APR 97TABLE I. Electrical performanc