DLA DSCC-VID-V62 09633-2011 MICROCIRCUIT DIGITAL MICROPROCESSOR VOLTAGE MONITORS WITH PROGRAMMABLE VOLTAGE DETECTION MONOLITHIC SILICON.pdf

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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.milOriginal date of drawing YY

2、MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, MICROPROCESSOR VOLTAGE MONITORS WITH PROGRAMMABLE VOLTAGE DETECTION, MONOLITHIC SILICON 11-07-14 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09633 REV PAGE 1 OF 10 AMSC N/A 5962-V058-11 Provided by IHSNot for ResaleN

3、o reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance microprocessor voltage monitor with programmable

4、 voltage detection microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engi

5、neering documentation: V62/09633 - 01 X B Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 MAX8211 Microprocessor voltage monitors with programmable voltage detection 02 MAX8212 Microprocessor voltag

6、e monitors with programmable voltage detection 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 JEDEC MS012 Small outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by

7、the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 1623

8、6 DWG NO. V62/09633 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V to +18 V Output voltage . -0.5 V to +18 V Hysteresis . +0.5 V to -18 V with respect to (V+ + 0.5 V) Threshold input voltage . -0.5 V to (V+ + 0.5 V) Current into any terminal . 50 mA Continuous power dissipation

9、(TA= +70C) Case outline X (derate 5.88 mW/C above +70C) 471 mW Operating temperature range -55C to +125C Storage temperature range . -65C to 150C Lead temperature (soldering , 10 sec) +300C Electro Static Discharge (ESD) Human Body Model (HBM) 800 V Class 1B Moisture Sensitive Level (MSL) . Level 1

10、1.4 Thermal data table. Case outline letter X X Units PC Board Single Layer Multi-Layer 2/ Power dissipation (PD), maximum at +70C 471 588 mW Power dissipation (PD) derating above +70C 5.9 7.4 mW/C Thermal resistance, junction to case (JC) 40 38 C/W Thermal resistance, junction to ambient (JA) 170 1

11、36 C/W 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at h

12、ttp:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the dev

13、ice at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Package thermal resistances were obtained using the method described in JEDEC spec

14、ification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to manufacturer data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG

15、 NO. V62/09633 REV PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit

16、container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, constru

17、ction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagra

18、m. The block diagram shall be as shown in figure 3. 3.5.4 Threshold trip voltage vs ambient temperature. The threshold trip voltage vs ambient temperature shall be as shown in figure 4. 3.5.5 Basic overvoltage/undervoltage circuit. The basic overvoltage/undervoltage circuit shall be as shown in figu

19、re 5. 3.5.6 Logic supply low voltage detector. The logic supply low voltage detector shall be as shown in figure 6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV

20、 PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ Device type Limits Unit Min Max Supply current I+ 2 V null V+ null 16.5 V GND null VTHnull V+ TA= 25C All 15 A TA= -55C to +125C 20 Threshold trip voltage VTHTA= 25C V+ = 16.5 V, IOUT= 4 mA 1.11 1.19 V V+ = 2 V, IO

21、UT= 500 A TA= -55C to +125C V+ = 16.5 V, IOUT= 3 mA 1.05 1.25 V+ = 2.2 V, IOUT= 500 A Threshold voltage disparity between output and hysteresis output VTHPIOUT= 4 mA, IHYST= 1 mA null0.1 TYP mV Guaranteed operating supply voltage range VSUPPTA= 25C 2.0 16.5 V TA= -55C to +125C 2.2 16.5 Typical opera

22、ting supply voltage range VSUPP1.5 16.5 Threshold voltage temperature coefficient VTH/T See figure 4 -200 TYP ppm/CVariation of threshold voltage with supply voltage VTHV+ = 4.5 V to 5.5 V 01 1.0 mV 02 0.2 Threshold input current ITH0 V null VTHnull V+, TA= 25C All 10 nA TA= -55C to +125C 20 Output

23、leakage current ILOUTTA= -55C to +125C VOUT= 16.5 V, VTH= 0.9 V 01 30 A VOUT= 16.5 V, VTH= 1.3 V 02 30 VOUT= 5 V, VTH= 0.9 V 01 10 VOUT= 5 V, VTH= 1.3 V 02 10 Output saturation voltage VOLIOUT= 2 mA, VTH= 1.0 V 01 0.4 V IOUT= 2 mA, VTH= 1.3 V 02 0.4 Maximum available output current IOHVOUT= 5 V VTH=

24、 1.0 V 3/ 01 4 mA VTH= 1.3 V 4/ 02 12 Hysteresis leakage current ILHYSTA= -55C to +125C, V+ = 16.5 V, VTH= 0.9 V VHYST= -16.5 V with respect to V+ All 3 Hysteresis saturation voltage VHYS(MAX)IHYST= 0.5 mA, VTH= 1.3 V measured with respect to V+ All -0.2 V Maximum available hysteresis current IHYS(M

25、AX)VTH= 1.3 V, VHYS= 0 V All 2 mA 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily

26、 be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ V+ = 5 V, TA= 25C, unless otherwise noted. 3/ The maximum output current of the device type 01 is limited by design to 30 mA under any operating condition. The output volta

27、ge may be sustained at any voltage up to +16.5 V as long as the maximum power dissipation of the device is not exceeded. 4/ The maximum output current of the device type 02 is not defined, and system using device type 02 must therefore ensure that the output current does not exceed 50 mA and that th

28、e maximum power dissipation of the device is not exceeded. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV PAGE 6 Case X Dimensions Symbol Inches Millimeters Symbo

29、l Inches Millimeters Min Max Min Max Min Max Min Max A .053 .069 1.35 1.75 E .150 .157 3.80 4.00 A1 .004 .010 0.10 0.25 E1 .228 .244 5.80 6.20 b .014 .019 0.35 0.49 e .050 BSC 1.27 BSC c .007 .010 0.19 0.25 L .016 .050 0.40 1.27 D .189 .167 4.80 5.00 NOTES: 1. D and E do not include mold flash. 2. M

30、old flash or protrusions not to exceed 0.15 mm (.006”). 3. Leads to be coplanar within 0.10 mm (.004”). 4. Meets JEDEC MS013. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDE

31、NT NO. 16236 DWG NO. V62/09633 REV PAGE 7 Case outline: X Terminal number Terminal symbol Terminal number Terminal symbol 1 NC 5 GND 2 HYST 6 NC 3 THRES 7 NC4 OUT 8 v+ NC = Not connect FIGURE 2. Terminal connections. FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking

32、 permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV PAGE 8 FIGURE 4. Threshold trip voltage vs ambient temperature. FIGURE 5. Basic overvoltage/undervoltage circuit. Provided by IHSNot for ResaleNo reproduction or networking

33、permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV PAGE 9 FIGURE 6. Logic supply low voltage detector. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME CO

34、LUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09633 REV PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling

35、of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electros

36、tatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer

37、reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for

38、 the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/09633-01XB 1ES66 MAX8211MSA/PR MAX8211MSA/PR-T 2/ V62/09633-02XB 3/ 1ES66 MAX8212MSA/PR MAX8212MSA/PR-T 2/ 1/ The vendor item drawing establishes an administrative control number for

39、identifying the item on the engineering documentation. 2/ For tape and reel. 3/ Contact the manufacturer for availability. CAGE code Source of supply 1ES66 Maxim Integrated Products 120 San Gabriel Dr Sunnyvale, CA 94086-5125 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-