DLA SMD-5962-89712 REV B-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 16K X 4 BITS SRAM (STD POWER) MONOLITHIC SILICON《硅单片 16K X 4BITS静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-89712 REV B-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 16K X 4 BITS SRAM (STD POWER) MONOLITHIC SILICON《硅单片 16K X 4BITS静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89712 REV B-2007 MICROCIRCUITS MEMORY DIGITAL CMOS 16K X 4 BITS SRAM (STD POWER) MONOLITHIC SILICON《硅单片 16K X 4BITS静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf（15页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Updated boilerplate. Added CAGE 75596 as a source of supply. - glg 99-05-04 Raymond Monnin B Boilerplate update and part of five year review. tcr 07-06-05 Robert M. Heber REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5

2、 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Charles Reusing DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUITS, MEMORY, D

3、IGITAL, CMOS, 16K X 4 BITS SRAM, (STD POWER), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-05-08 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89712 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E402-07 Provided by IHSNot for ResaleNo reproduction or netwo

4、rking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class

5、 level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-89712 01 X A | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.

6、2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Acces time 01 16K X 4 SRAM with separate I/O 45 ns 02 16K X 4 SRAM with separate I/O 35 ns 03 16K X 4 SRAM with separate I/O 25 ns 04 16K X 4 SRAM with separate I/O 20 ns 1

7、.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP4-T28 or CDIP3-T28 28 Dual-in-line package Y GDFP2-F28 28 Flat package Z CQCC4-N28 28 Rectangular chip carrier package U CQCC3-N28 28 Rectan

8、gular chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential (VCC) -0.5 V dc to +7.0 V dc DC voltage applied to outputs in high Z state . -0.5 V dc to +7.0 V dc DC input voltage (VIN) 2/ -

9、0.5 V dc to +7.0 V dc DC output current . 20 mA Maximum power dissipation 1.0 W Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) 3/ +150C Storage temperature range. -65C to +150C Temperature under bias . -55C to +

10、125C 1.4 Recommended operating conditions. Supply voltage range (VCC). +4.5 V dc to +5.5 V dc Ground voltage (GND) 0 V dc Input high voltage (VIH) . 2.2 V dc minimum Input low voltage (VIL). 0.8 V dc maximum Operating case temperature range (TC) -55C to +125C 1/ Generic numbers are listed on the Sta

11、ndardized Military Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL- HDBK -103 (see 6.6 herein). 2/ VILminimum = -3.0 V for pulse width less than 20 ns. 3/ Maximum junction temperature may be increased to 175C during burn-in and steady state life. Provided

12、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, stand

13、ards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integr

14、ated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-

15、HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. I

16、n the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements Th

17、e individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been

18、 granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to

19、 the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Desi

20、gn, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be a

21、s specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL

22、-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provi

23、ded by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3

24、.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA

25、WING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN ma

26、y also be marked. For packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in complianc

27、e to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in ord

28、er to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements h

29、erein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this dr

30、awing. 3.9 Verification and review. DSCC, DSCCs agent and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspec

31、tion. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall appl

32、y: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, output

33、s, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are opt

34、ional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall

35、be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINand COUT measurement) shall be measured only for the initial test and after any design or process changes which may affect input capacitance. Sample size is 15 devices

36、with no failures, and all input and output terminals tested. d. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COL

37、UMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ 2/ -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Min Max Unit Output high voltage VOHVCC= 4.5 V, I

38、OH= -4.0 mA, VIN= VIHor VIL1, 2, 3 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOL= 8.0 mA VIN= VIHor VIL1, 2, 3 All 0.4 V Input high voltage VIH 3/ 1, 2, 3 All 2.2 V Input low voltage VIL 3/ 1, 2, 3 All 0.8 V Input leakage current IIXVIN= 5.5 V to GND 1, 2, 3 All -10 10 A Output leakage current IOZ

39、VCC= 5.5 V VOUT= 5.5 V to GND 1, 2, 3 All -10 10 A 01,02 140 03 155 Operating supply current ICC1VCC= 5.5 V, IOUT= 0 mA CE = VIL, f = fMAX4/ 1, 2, 3 04 175 mA 01,02 50 03 60 Standby power supply current, TTL ICC2VCC= 5.5 V, IOUT= 0 mA CE VIH, f = 0 4/ all other inputs VILor VIH1, 2, 3 04 70 mA 01-03

40、 20 Standby power supply current, CMOS ICC3CE (VCC-0.2 V), VCC= 5.5 V, f = 0 4/ all other inputs 0.2 V or (VCC-0.2 V) 1, 2, 3 04 25 mA Input capacitance CIN 5/ VIN= 0.0 V, VCC= 5.0 V TA= +25C, f = 1 Mhz, (see 4.3.1c) 4 All 8 pF Output capacitance COUT 5/ VO= 0 V, VCC= 5.0 V TA= +25C, f = 1 Mhz, (see

41、 4.3.1c) 4 All 8 pF Functional tests See 4.3.1d 7,8A,8B All See footnotes at the end of the table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

42、0 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Limits Test Symbol Conditions 1/ 2/ -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Min Max Unit 01 45 02 35 03 25 Read cycle time tAVAV9,10,11 04 20 n

43、s 01 45 02 35 03 25 Address access time tAVQV9,10,11 04 20 ns Output hold from address change tAVQX9,10,11 All 5 ns 01 45 02 35 03 25 Chip enable access time tELQV9,10,11 04 20 ns Chip enable to output active 5/ 6/ tELQX9,10,11 All 5 ns 01,02 15 03 10 Chip select to output inactive 5/ 6/ tEHQZ9,10,1

44、1 04 8 ns 01 25 02 20 03 12 Output enable to output valid tOLQV9,10,11 04 10 ns Output enable to output active 5/ 6/ tOLQX9,10,11 All 3 ns 01,02 15 03 10 Output enable to output inactive 5/ 6/ tOHQZSee figures 3 and 4 9,10,11 04 8 ns See footnotes at the end of the table. Provided by IHSNot for Resa

45、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Limits Test Symb

46、ol Conditions 1/ 2/ -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Min Max Unit Chip enable to power up 5/ tELPU9,10,11 All 0 ns 01 45 02 35 03 25 Chip enable to power down 5/ tEHPD9,10,11 04 20 ns 01 40 02 30 03 20 Write cycle time tAVAV9,10,11 04 20 ns 01 35

47、 02 25 03 20 Chip enable to write end tELWH tELEH9,10,11 04 17 ns 01 35 02 25 03 20 Address setup to end of write tAVWH tAVEH9,10,11 04 17 ns Address hold from write end tWHAX tEHAX9,10,11 All 0 ns Address setup to write start tAVWL tAVELSee figures 3 and 4 9,10,11 All 0 ns See footnotes at the end of the table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89712 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR