DLA SMD-5962-88642 REV A-2005 MICROCIRCUIT DIGITAL CMOS PROCESSOR INTERFACE CIRCUIT MONOLITHIC SILICON《硅单片处理器接口电路互补型金属氧化物半导体数字微电路》.pdf

《DLA SMD-5962-88642 REV A-2005 MICROCIRCUIT DIGITAL CMOS PROCESSOR INTERFACE CIRCUIT MONOLITHIC SILICON《硅单片处理器接口电路互补型金属氧化物半导体数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-88642 REV A-2005 MICROCIRCUIT DIGITAL CMOS PROCESSOR INTERFACE CIRCUIT MONOLITHIC SILICON《硅单片处理器接口电路互补型金属氧化物半导体数字微电路》.pdf（25页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Correct dimensioning on case outlines T, U, and X. - CFS 05-11-01 Thomas M. Hess REV SHET REV A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV A A A A A A A A A A A A A A OF

2、SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED Wanda L. Meadows DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MIC

3、ROCIRCUIT, DIGITAL, CMOS, PROCESSOR AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-03-10 INTERFACE CIRCUIT, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88642 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E503-05 Provided by IHSNot for ResaleNo reproduction

4、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-

5、JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88642 01 T X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The

6、device type(s) identify the circuit function as follows: Device type Generic number Circuit function Clock speed 01 P1754 Processor interface with system configuration inputs 20 MHz 02 P1754 Processor interface with system configuration inputs 30 MHz 03 P1754 Processor interface with system configur

7、ation inputs 40 MHz 04 P1754 Processor interface 20 MHz 05 P1754 Processor interface 30 MHz 06 P1754 Processor interface 40 MHz 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style T See figure 1 64

8、 Dual-in-line with gull-wing leads U See figure 1 68 Leaded chip carrier X See figure 1 64 Dual-in-line Y See figure 1 68 Leaded chip carrier with gull-wing leads Z See figure 1 68 Pin grid array 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ra

9、tings. Supply voltage range, (VCC) -0.5 V dc to +7.0 V dc Input voltage range . -0.5 V dc to VCC+ 0.5 V dc Storage temperature range . -65C to +150C Input current range -30 mA to +5 mA Current applied to any output 150 mA Maximum power dissipation (PD) 1/ 1.5 W Lead temperature range (soldering, 10

10、seconds) +300C Thermal resistance, junction-to-case (JC): Cases X and T. 8C/W Cases Y and U 5C/W Case Z. 6C/W _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

11、DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range. 4.5 V dc to 5.5 V dc Case operating temperature range (TC) -55C to +125C Operating power dissipation (PD) (out

12、puts open): Device types 01 and 04 . 0.25 W maximum Device types 02 and 05 . 0.30 W maximum Device types 03 and 06 . 0.35 W maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the

13、 extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test M

14、ethod Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.da

15、ps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

16、drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level

17、 B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the

18、manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These m

19、odifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as spe

20、cified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and as specified on figure 2. 3.2.3 Functional block diagram. The functional block d

21、iagram shall be as specified on figure 3. 3.2.4 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

22、962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case o

23、perating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be

24、marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance

25、mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certifica

26、te of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufa

27、cturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of chang

28、e. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be ma

29、de available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 9

30、7 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max Input high voltage VIH1, 2, 3 All 2.0 VCC+ 0.5 V Input low voltage VIL1, 2, 3 All -0.5 0.8 V Input clamp diode volta

31、ge VCDVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V IOH= -8.0 mA 2.4 Output high voltage VOHVCC= 4.5 V, VIN= 2.0 V, 0.8 V IOH= -300 A 1, 2, 3 All VCC 0.2 V IOL= 8.0 mA 0.5 Output low voltage, except A0 A15VOLVCC= 4.5 V, VIN= 2.0 V, 0.8 V IOL= 300 A 1, 2, 3 All 0.2 V IOL= 20 mA 0.5 Output low voltage, A

32、0 A15VOLVCC= 4.5 V, VIN= 2.0 V, 0.8 V IOL= 300 A 1, 2, 3 All 0.2 V Input high current, except IBO IB15, parity/IB16, SING ERR, A0/EXT AD0, A1/EXT AD1, STRBA IIH1, 2, 3 All 10 A Input high current, IBO IB15, parity/IB16, A0/EXT AD0, A1/EXT AD1IIH1, 2, 3 All 50 A Input high current, STRBA, SING ERR II

33、HVIN= VCCVCC= 5.5 V 1, 2, 3 All 500 A Input low current, except IBO IB15, parity/IB16, SING ERR, A0/EXT AD0, A1/EXT AD1, STRBD, TEST ON IIL1, 2, 3 All -10 A Input low current, IBO IB15, parity/IB16, SING ERR, A0/EXT AD0, A1/EXT AD1IIL1, 2, 3 All -50 A Input low current, STRBD, TEST ON IILVIN= GND VC

34、C= 5.5 V 1, 2, 3 All -500 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 223

35、4 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max Output three-state current IOZHVOUT= 2.4 V VCC= 5.5 V 1, 2, 3 All 50 A Output three-state current

36、 IOZLVOUT= 0.5 V VCC= 5.5 V 1, 2, 3 All -50 A Quiescent power supply current (CMOS inputs) ICCQCVIN 0.2 V or VCC -0.2 V, f = 0 MHz, outputs open, VCC= 5.5 V 1, 2, 3 All 10 mA Quiescent power supply current (TTL input levels) ICCQTVIN= 3.4 V, f = 0 MHz, all inputs, outputs open, VCC= 5.5 V 1, 2, 3 Al

37、l 50 mA 01, 04 40 02, 05 50 Dynamic power supply current ICCDVIN= 0 V to VCC, tr= tf= 2.5 ns typically, outputs open, VCC= 5.5 V 1, 2, 3 03, 06 60 mA Output short circuit current 2/ IOSVOUT= GND VCC= 5.5 V 1, 2, 3 All -25 mA Input capacitance CINSee 4.3.1c, inputs only 4 All 10 pF Output/bi-directio

38、nal capacitance COUTSee 4.3.1c, outputs, (including I/O buffers) 4 All 15 pF Functional tests See 4.3.1d, VCC= 4.5 V, 5.5 V 7, 8 All 01, 04 16 02, 05 14 Time from external ready to ready data valid TEX RDY- (RDYD)V9, 10, 11 03, 06 12 ns 01, 04 28 02, 05 22 Time from clock read to ready data valid TC

39、- (RDYD)V9, 10, 11 03, 06 16 ns 01, 04 29 02, 05 21 Time from strobe address high to address bus valid TSTRBAH- (A)V9, 10, 11 03, 06 19 ns 01, 04 31 02, 05 22 Time from information bus address to address bus valid TIBAV- (A)V9, 10, 11 03, 06 20 ns 01, 04 24 02, 05 18 Time from falling clock to read

40、low TFC(R)LSee figure 4 VCC= 4.5 V 3/ 9, 10, 11 03, 06 12 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS

41、ION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max 01, 04 24 02, 05 18 Time from strobe data high to read high TSTR

42、BDH- (R)H9, 10, 11 03, 06 12 ns 01, 04 26 02, 05 20 Time from strobe data low to write low TSTRBDL- (W)L9, 10, 11 03, 06 15 ns 01, 04 26 02, 05 20 Time from strobe data high to write high TSTRBDH- (W)H9, 10, 11 03, 06 15 ns 01, 04 22 02, 05 17 Time from information bus data in to memory parity error

43、 low TIBDIN- (ME PA ER)L9, 10, 11 03, 06 12 ns 01, 04 30 02, 05 25 Time from information bus address in to external address error TIBAIN- (EX AD ER) 9, 10, 11 03, 06 20 ns 01, 04 26 02, 05 20 Time from strobe data low to start-up run valid TSTRBAH- (A)V9, 10, 11 03, 06 15 ns 01, 04 30 02, 05 25 Time

44、 from falling clock to information bus valid TFC- (IB OUT)V9, 10, 11 03, 06 25 ns 01, 04 30 02, 05 25 Time from rising edge of clock to timer clock TC- (TIMER CLK) 9, 10, 11 03, 06 20 ns 01, 04 25 02, 05 20 Time from information bus data to parity valid TIB INV- (IB16) 9, 10, 11 03, 06 18 ns 01, 04

45、10 02, 05 10 Extended address setup time TEXT AD (CLKB3) 9, 10, 11 03, 06 10 ns 01, 04 28 02, 05 24 Time from external ready data to ready data valid TEX RDY1- (RDYD)VSee figure 4 VCC= 4.5 V 3/ 9, 10, 11 03, 06 21 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or netw

46、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5

47、V VCC 5.5 V unless otherwise specified 1/ Group A subgroups Device type Limits Unit Min Max 01, 04 30 02, 05 24 Time from falling clock to SCR enable; case types T and X only TFC- (SCR EN) 9, 10, 11 03, 06 24 ns 01, 04 30 02, 05 24 Time from STRBD high to SCR enable; case types T and X only TSTRBDH-

48、 (SCR EN) See figure 4 VCC= 4.5 V 3/ 9, 10, 11 03, 06 24 ns 1/ Unless otherwise specified, all testing shall be conducted under worst-case conditions. 2/ Only one output may be shorted at a time. 3/ All measurements of delay times on active signals are related to the 1.5 V levels. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88642 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR