DLA SMD-5962-87577 REV B-2005 MICROCIRCUIT CMOS OCTAL BUS TRANSCEIVER MONOLITHIC SILICON《硅单块 八进制总线接收器 互补金属氧化物半导体 微型电路》.pdf

《DLA SMD-5962-87577 REV B-2005 MICROCIRCUIT CMOS OCTAL BUS TRANSCEIVER MONOLITHIC SILICON《硅单块 八进制总线接收器 互补金属氧化物半导体 微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-87577 REV B-2005 MICROCIRCUIT CMOS OCTAL BUS TRANSCEIVER MONOLITHIC SILICON《硅单块 八进制总线接收器 互补金属氧化物半导体 微型电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate and made editorial changes throughout. - LTG 00-05-19 Monica L. Poelking B Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-07-25 Thomas M. Hess THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV

2、 SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTME

3、NTS APPROVED BY N. A. Hauck MICROCIRCUIT, CMOS, OCTAL BUS TRANSCEIVER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-04-21 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87577 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E412-05 DISTRIBUTION STATEMENT A. Ap

4、proved for public release; distribution is unlimitedProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 9

5、7 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87577 01 R X Drawing number

6、Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 82C86 CMOS octal bus transceiver 02 82C87 CMOS octal inverting bus transceiver 1.2.2 Case outline(s)

7、. The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.

8、1.3 Absolute maximum ratings. Supply voltage range (referenced to ground). +8.0 V dc maximum Input, output or I/O voltage applied GND -0.5 V dc to VCC+0.5 V dc Storage temperature range -65C to +150C Maximum power dissipation, (PD) 1.0 W 1/ Lead temperature (soldering, 10 seconds) +275C Maximum junc

9、tion temperature (TJ). +150C Thermal resistance, junction-to-case (JC): Case R . (See MIL-STD-1835) Case 2 23C/W 2/ _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). 2/ When a thermal resistance value for this case is included in MIL-STD-1835 that value shall supersede the value

10、 indicated herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating condi

11、tions. Supply voltage (VCC) +4.5 V dc minimum to +5.5 V dc maximum Input to output delay, inverting or noninverting (tIVOV) 5 ns minimum 3/ 4/ 5/ (reference no. 1) Transmit/receive hold time (tEHTV) 5 ns minimum 3/ 4/ (reference no. 2) Transmit/receive setup time (tTVEL) 10 ns minimum 3/ 4/ (referen

12、ce no. 3) Output disable time (tEHOZ). 5 ns minimum to 35 ns maximum 3/ 4/ (reference no. 4) Output enable time (tELOV) 10 ns minimum 3/ 4/ 5/ (reference no. 5) Input rise/fall time (tr/tf). 20 ns minimum 3/ 4/ (reference no. 6) Minimum output enable high time (tEHEL) . 35 ns minimum 3/ 4/ 6/ (refer

13、ence no. 7) Case operating temperature range (TC). -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of

14、 these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Ele

15、ctronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the St

16、andardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supers

17、edes applicable laws and regulations unless a specific exemption has been obtained. _ 3/ Not tested but characterized at initial device design and after major process or design changes affecting this parameter. 4/ See appropriate ac test load and timing reference number see figure 4. 5/ Reference ta

18、ble I for other limit. 6/ A system limitation only when changing directions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHE

19、ET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML)

20、 certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as docu

21、mented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-3853

22、5 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 her

23、ein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.2.5 Test circuit and timing waveforms. The test circuit and t

24、iming waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. T

25、he electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manu

26、facturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufactur

27、er in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requi

28、rements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affect

29、s this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for Resale

30、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC

31、 +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max VCC= 4.5 V, IOH= -8.0 mA B outputs 1/ 3.0 VCC= 4.5 V, IOH= -4.0 mA A outputs 1/ 3.0 Output high voltage VOHVCC= 4.5 V, IOH= -100 A A or B outputs 1/ 1, 2, 3 All VCC-0.4 V VCC= 4.5 V, IOL= 20 mA B outputs 1/ Output lo

32、w voltage VOLVCC= 4.5 V, IOL= 12 mA A outputs 1/ 1, 2, 3 All 0.45 V Input high level VIHVCC= 5.5 V 2/ 1, 2, 3 All 2.2 V Input low level VILVCC= 4.5 V 1, 2, 3 All 0.8 V Input leakage current IINVCC= 5.5 V, VIN= VCCor GND 1, 2, 3 All -10.0 10.0 A Output leakage current IOUTVCC= 5.5 V, VOUT= VCCor GND,

33、 OE VCC0.5 V 1, 2, 3 All -10.0 10.0 A Standby supply current ICCSBVCC= 5.5 V, VIN= VCCor GND, outputs open 1, 2, 3 All 10 A All Case R 13 Input capacitance, A inputs CINf = 1.0 MHz, TC= +25C All measurements referenced to device ground. See 4.3.1c 4 All Case 2 10 pF All Case R 17 Input capacitance,

34、B inputs CINf = 1.0 MHz, TC= +25C All measurements referenced to device ground. See 4.3.1c 4 All Case 2 15 pF All Case R 12 Input capacitance, all other inputs CINf = 1.0 MHz, TC= +25C All measurements referenced to device ground. See 4.3.1c 4 All Case 2 7 pF Functional test VCC= 4.5 V and 5.5 V 3/

35、See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97

36、 TABLE I. Electrical performance characteristics. - Continued Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxInput to output delay, inverting or noninverting tIVOVVCC= 4.5 V and 5.5 V 3/ Reference number 1 and figure 4. 9, 10, 11 All

37、4/ 35 ns Output enable time tELOVVCC= 4.5 V and 5.5 V 3/ Reference number 5 and figure 4 9, 10, 11 All 4/ 65 ns 1/ Interchanging of force and sense conditions is permitted. 2/ VIHis measured by applying a pulse magnitude = VIHminimum to one data input at a time and checking the corresponding device

38、output for a valid logical one during valid input high time. Control pins, T (transmit) and OE, are tested separately with all device data input pins at VCC0.4 V. 3/ Tested as follows: f = 1 MHz, VIH= 2.6 V, VIL= 0.4 V, CL= 50 pF (unless otherwise specified), VOH 1.5 V, VOL 1.5 V, and VIHfor T (tran

39、smit control pin) VCC0.5 V. Input rise and fall times are driven at 1 ns/V. 4/ Reference 1.4 for this limit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

40、 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines R and 2 Terminal Number Terminal Symbol Terminal Number Terminal Symbol 1 2 3 4 5 6 7 8 9 10 A0A1A2A3 A4 A5 A6 A7 OE GND 11 12 13 14 15 16 17 18 19 20 T B7B6 B5 B4 B3 B2 B1 B0 VCCDevice type 02 Case outlines R an

41、d 2 Terminal Number Terminal Symbol Terminal Number Terminal Symbol 1 2 3 4 5 6 7 8 9 10 A0A1A2A3 A4 A5 A6 A7 OE GND 11 12 13 14 15 16 17 18 19 20 T B7B6 B5 B4 B3 B2 B1 B0 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

42、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 T OE A B X H Z Z H L I O L L O I H = Logic one L = Logic zero I = Input mode O = Output mode X = Irrelevant Z = High impedance FIGURE 2. Truth

43、table. FIGURE 3. Bock diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTE: Includes jig

44、and stray capacitance. Resistances have a tolerance of 1%. Capacitances have a tolerance of 10%. FIGURE 4. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPP

45、LY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 All timing measurements are made at 1.5 V unless otherwise noted. Inputs must switch between VIL0.4 V and VIH+0.4 V. FIGURE 4. Test circuit and timing waveforms Continued. Provided by IHSNot for ResaleNo rep

46、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87577 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shal

47、l be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-88

48、3. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim e