DLA SMD-5962-87575 REV B-2005 MICROCIRCUIT DIGITAL NMOS MULTIMODE DMA CONTROLLER MONOLITHIC SILICON《硅单块 多模式直接存储器存取控制器 N沟道金属氧化物半导体 数字微型电路》.pdf

《DLA SMD-5962-87575 REV B-2005 MICROCIRCUIT DIGITAL NMOS MULTIMODE DMA CONTROLLER MONOLITHIC SILICON《硅单块 多模式直接存储器存取控制器 N沟道金属氧化物半导体 数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-87575 REV B-2005 MICROCIRCUIT DIGITAL NMOS MULTIMODE DMA CONTROLLER MONOLITHIC SILICON《硅单块 多模式直接存储器存取控制器 N沟道金属氧化物半导体 数字微型电路》.pdf（24页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R347-92. 92-11-23 Monica L. Poelking B Add D device type criteria. Correct drawing title to accurately reflect device function. Add vendor CAGE 3V146. Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-

2、02-08 Thomas M. Hess Current CAGE code is 67268. The original first page of this drawing has been replaced. REV SHET REV B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Ray Monnin DEFE

3、NSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, NMOS, MULTIMODE DMA CONTROLLER, MONOLITHIC SILICON AND AGENCIES OF TH

4、E DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-06-30 AMSC N/A REVISION LEVEL SIZE A CAGE CODE 14933 5962-87575 B SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E071-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

5、962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Id

6、entifying Number (PIN). The complete PIN is as shown in the following example: 5962-87575 01 Q X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit

7、function 01 9517A Multimode DMA Controller 02 9517A-4 Multimode DMA Controller 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line 1.2.3 Lead finish. The le

8、ad finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range -0.5 V dc to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1.5 W Lead temperature (soldering, 10 seconds). +300C Th

9、ermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +150C 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) (other than CLK) +2.2 V dc Minimum high level input voltage for CLK (VIHCLK) +2.35 V dc

10、 Maximum low level input voltage (VIL) +0.7 V dc Minimum low level input voltage (VIL). -0.5 V dc Maximum high level input voltage (VIH) VCC+ 0.5 V dc Case operating temperature range (TC) . -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

11、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

12、 of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDAR

13、DS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available on

14、line at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein,

15、the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for no

16、n-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in acc

17、ordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of th

18、e device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the alternate die/fabrication requi

19、rements of paragraph A.3.2.2 of MIL-PRF-38535. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.

20、2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The

21、switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IH

22、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requiremen

23、ts shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mar

24、ked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance

25、to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, the “D” certification mark shall be used i

26、n place of the “C” certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an ap

27、proved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits

28、delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requir

29、ed documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321

30、8-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Low level input voltage VILVCC= 4.5 V and 5.5 V 0.7 V High level input voltage VIHV

31、CC= 4.5 V and 5.5 V 2.2 V High level input voltage VIH(CLK) VCC= 4.5 V and 5.5 V (CLK only) 2.35 V Low level output voltage VOLVCC= 5.5 V IOL= 3.2 mA 0.45 V High level output voltage VOHVCC= 4.5 V IOH= -200 A 2.4 V VCC= 4.5 V IOH= -200 A 2.4 High level output voltage (HREQ) VOH(HREQ) VCC= 4.5 V IOH=

32、 -100 A (HREQ only) 3.3 V Input load current ILIVCC= 5.5 V VIN= 0.0 V and 5.5 V -10 +10 A Output leakage current ILOL, ILOHVCC= 5.5 V VOUT= 0.40 V and 5.5 V -10 +10 A Quiescent supply current ICCVCC= 5.5 V Outputs not loaded. Dynamic 1/ 1, 2, 3 150 mA Input capacitance CINfc = 1 MHz See 4.3.1c 15 pF

33、 Input/output capacitance CI/OUnmeasured pins returned to VSS. VCC= 0 V See 4.3.1c 18 pF Output capacitance COUTfc = 1 MHz See 4.3.1c 4 20 pF Functional tests See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

34、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgrou

35、ps Device type Limits Unit Min Max 01 300 AEN HIGH from CLK LOW (S1) delay time tAEL02 225 ns 01 200 AEN LOW from CLK HIGH (S1) delay time tAET02 150 ns 01 150 ADR active to float delay from CLK HIGH 4/ tAFAB02 120 ns 01 150 READ, WRITE float delay from CLK HIGH 4/ tAFC02 120 ns 01 250 DB active to

36、float delay from CLK HIGH 4/ tAFDB02 190 ns ADR from READ HIGH hold time tAHRAll tCY- 100 ns DB from ADSTB LOW hold time tAHS30 ADR from WRITE HIGH hold time tAHWAll tCY- 50 ns 01 280 DACK valid from CLK LOW delay time tAK02 220 ns 01 250 EOP HIGH from CLK HIGH delay and EOP LOW to CLK HIGH delay ti

37、me 5/ tAK02 190 ns 01 250 ADR stable from CLK HIGH tASM02 190 ns DB to ADSTB LOW setup time tASSAll 100 ns 01 120 Clock high time (transitions 10 ns) tCH02 100 ns 01 150 Clock low time (transitions 10 ns) tCLSee figure 4. 2/ 3/ 9, 10, 11 02 110 ns See footnotes at end of table. Provided by IHSNot fo

38、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbo

39、l Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max 01 320 CLK cycle time tCY02 250 ns 01 270 CLK HIGH to READ, WRITE LOW delay 6/ tDCL02 200 ns 01 270 READ HIGH from CLK HIGH (S4) delay time 6/ tDCTR02 210 ns 01 200 WRITE HIGH from CLK HIGH (S4) d

40、elay time 6/ tDCTW02 150 ns 01 160 HREQ valid from CLK HIGH delay time 7/ tDQ102 120 ns 01 2tCY+ 250 HREQ valid from CLK HIGH delay time 7/ tDQ202 2tCY+ 190 ns 01 60 EOP LOW from CLK LOW setup tEPS02 45 ns 01 300 EOP pulse width tEPW02 225 ns 01 250 ADR float to active delay from CLK HIGH tFAAB02 19

41、0 ns 01 200 READ, WRITE active from CLK HIGH tFAC02 150 ns 01 300 DB float to active delay from CLK HIGH tFADB02 225 ns 01 100 HACK valid to CLK HIGH setup tHSSee figure 4. 2/ 3/ 9, 10, 11 02 75 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wi

42、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specif

43、ied Group A subgroups Device type Limits Unit Min Max Input data from MEMR HIGH hold time tIDHAll 0 ns 01 250 Input data to MEMR HIGH setup time tIDS02 190 ns Output data from MEMW HIGH hold time tODHAll 20 ns 01 200 Output data valid to MEMW HIGH 8/ tODV02 125 ns 01 0 DREQ to CLK LOW (S1, S4) setup

44、 time tQS02 0 ns CLK to READY LOW hold time tRHAll 20 ns 01 100 READY to CLK setup time tRS02 60 ns 01 200 ADSTB HIGH from CLK HIGH delay time tSTL02 150 ns 01 140 ADSTB LOW from CLK HIGH delay tSTT02 110 ns DREQ from DACK valid hold time tQHAll 0 ns HREQ to HACK delay time tRQHA1 CLK ADR valid or C

45、S LOW to READY LOW tARAll 50 ns 01 200 ADR valid to WRITE HIGH setup time tAW02 150 ns 01 200 CS LOW to WRITE HIGH setup time tCWSee figure 4. 2/ 3/ 9, 10, 11 02 150 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

46、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device

47、type Limits Unit Min Max 01 200 Data valid to WRITE HIGH setup time tDW02 150 ns ADR or CS hold from READ HIGH tRAAll 0 ns 01 300 Data access from READ LOW 9/ tRDE02 200 ns 01 20 150 DB float delay from READ HIGH 4/ tRDF02 20 100 ns Power supply HIGH to reset LOW setup tRSTDAll 500 A RESET to first

48、IOWR tRSTS2tCYns RESET pulse width tRSTWAll 300 ns 01 300 READ width tRW02 250 ns ADR from WRITE HIGH hold time tWAAll 20 ns CS HIGH from WRITE HIGH hold time tWCData from WRITE HIGH hold time tWDAll 30 ns Write width tWWSSee figure 4. 2/ 3/ All 200 ns Data access from ADR valid CS LOW 10/ tADSee figure 4. 9, 10, 11 All 300 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87575 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LE