DLA SMD-5962-84094 REV C-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 4-BIT SYNCHRONOUS BCD COUNTER WITH SYCHRONOUS RESET MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendors 27014, 18714, and 04713. Changes to recommended operating conditions, table I, and table II. - gap 86-02-25 Nelson A. Hauck B Covert to military drawing format. Add vendor CAGE 27014 to case outline 2. - jej 88-02-12 Michael A. Frye C

2、 Make corrections to 1.4, recommended operating conditions for the rise and fall times at VCC= 2.0 V. Make corrections to conditions for VOHand VOLtests in table I. Update the drawing to the current requirements of MIL-PRF-38535. Editorial changes throughout. - jak 12-01-23 Thomas M. Hess CURRENT CA

3、GE CODE 67268 REV SHEET REV SHEET 15 16 17 REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR

4、 USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 4-BIT SYNCHRONOUS BCD COUNTER WITH SYCHRONOUS RESET, MONOLITHIC SILICON DRAWING APPROVAL DATE 84-09-28 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE

5、 14933 84094 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E102-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1.

6、1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 84094 01 E A Drawing number Device type (see 1

7、.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC162 4-bit synchronous BCD counter with synchronous reset 1.2.2 Case outline(s). The case outline(s) are as desi

8、gnated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3

9、Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 25 mA DC VCCor GND current (per

10、 pin) . 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 3/ Supply volt

11、age range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C,

12、derate linearly at 12 mW/C. 3/ See figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended ope

13、rating conditions Continued. 3/ Minimum recovery time, CLEAR to CLOCK (tREC): TC= +25C: VCC= 2.0 V 125 ns VCC= 4.5 V 25 ns VCC= 6.0 V 21 ns TC= -55C and +125C: VCC= 2.0 V 186 ns VCC= 4.5 V 37 ns VCC= 6.0 V 32 ns Minimum setup time, load, CLEAR or DATA, to CLOCK (tS): TC= +25C: VCC= 2.0 V 150 ns VCC=

14、 4.5 V 30 ns VCC= 6.0 V 26 ns TC= -55C and +125C: VCC= 2.0 V 225 ns VCC= 4.5 V 45 ns VCC= 6.0 V 38 ns Minimum setup time, enable to CLOCK (ts): TC= +25C: VCC= 2.0 V 175 ns VCC= 4.5 V 35 ns VCC= 6.0 V 30 ns TC= -55C and +125C: VCC= 2.0 V 260 ns VCC= 4.5 V 52 ns VCC= 6.0 V 44 ns Minimum pulse width, L

15、OAD, CLEAR or CLOCK (tw): TC= +25C: VCC= 2.0 V 100 ns VCC= 4.5 V 20 ns VCC= 6.0 V 17 ns TC= -55C and +125C: VCC= 2.0 V 150 ns VCC= 4.5 V 30 ns VCC= 6.0 V 26 ns Minimum hold time, DATA from CLOCK (th): TC= +25C: VCC= 2.0 V 50 ns VCC= 4.5 V 10 ns VCC= 6.0 V 9 ns TC= -55C and +125C: VCC= 2.0 V 75 ns VC

16、C= 4.5 V 15 ns VCC= 6.0 V 13 ns Maximum hold time, enable, LOAD, or CLEAR from CLOCK (th): TC= +25C: VCC= 2.0 V 25 ns VCC= 4.5 V 5 ns VCC= 6.0 V 5 ns TC= -55C and +125C: VCC= 2.0 V 40 ns VCC= 4.5 V 8 ns VCC= 6.0 V 7 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

17、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions Continued. 3/ Maximum CLOCK frequency (fCL): TC= +25C: VCC= 2.0 V 5 MHz VCC= 4.5 V 25 MHz VCC= 6.0 V 29 MHz

18、TC= -55C and +125C: VCC= 2.0 V 3.4 MHz VCC= 4.5 V 17 MHz VCC= 6.0 V 20 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the

19、 issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface St

20、andard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Docu

21、ment Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable la

22、ws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by

23、 a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance wi

24、th MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certificati

25、on mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outline

26、s shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

27、STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit sha

28、ll be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test

29、requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may a

30、lso be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in c

31、ompliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacture

32、r in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix

33、 A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be r

34、equired for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available

35、onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical perfo

36、rmance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH= - 4.0 mA VCC= 4.5 V 3.7 VIN= VIHor VILIOH=-

37、 5.2 mA VCC= 6.0 V 5.2 Low level output voltage VOLVIN= VIHor VILIOL = + 20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= +4.0 mA VCC= 4.5 V 0.4 VIN= VIHor VILIOL= +5.2 mA VCC= 6.0 V 0.4 High level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V

38、4.2 Low level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c 4 10 pF Quiescent supply current ICCVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 160 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND 1, 2, 3 1.0 A Functional test

39、s See 4.3.1d 7 Propagation delay time, CLOCK to RCO tPHL1tPLH13/ CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 225 ns 10, 11 340 VCC= 4.5 V 9 43 10, 11 65 VCC= 6.0 V 9 37 10, 11 55 Propagation delay time, CLOCK to Q tPHL2, tPLH23/ CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 205 ns 10, 11 310 VCC= 4.5 V 9 42 1

40、0, 11 62 VCC= 6.0 V 9 35 10, 11 53 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 9

41、7 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, ENT to RCO tPHL3, tPLH33/ CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 195 ns 10, 11 295 VCC= 4.5 V 9 39 10, 11 59

42、VCC= 6.0 V 9 33 10, 11 50 Transition time tTHL, tTLH4/ CL= 50 pF 10% See figure 4 VCC= 2.0 V 9 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at VCC= 4.5 V. Thus, the 4.5 V values shoul

43、d be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IIN, ICC,and IOZ) occur for CMOS at the higher voltage so the 6.0 V value should be used. Power dissipation capacitance (CP

44、D), typically 90 pF, determines the no-load dynamic power consumption (PD) and the no-load dynamic current consumption (IS). Where: PD= CPDVCC2f + ICCVCCIS= CPDVCCf + ICCf is the frequency of the input signal. 2/ VIHand VILtests not required if applied as a forcing function for VOHor VOL. 3/ AC test

45、ing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC

46、IRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type All Case outlines E and F 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CLEAR CLOCK A B C D ENP GND LOADENT QD

47、QC QB QA RCO VCC- - - - NC CLEAR CLOCK A B NC C D ENP GND NC LOADENT QDQC NC QB QA RCO VCCNC = No internal connection FIGURE 1. Terminal connections. CLOCK CLEAR ENP ENT LOADFunction L X X X Clear X H H L H Count and RCO disable X H L H H Count disable X H L L H Count and RCO disable H X X L Load H

48、H H H Increment counter H = High voltage level L = Low voltage level X = Irrelevant = Transition from low to high FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84094 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided