ANSI STM5.2-2012 Electrostatic Discharge Sensitivity Testing - Machine Model (MM) - Component Level.pdf

《ANSI STM5.2-2012 Electrostatic Discharge Sensitivity Testing - Machine Model (MM) - Component Level.pdf》由会员分享，可在线阅读，更多相关《ANSI STM5.2-2012 Electrostatic Discharge Sensitivity Testing - Machine Model (MM) - Component Level.pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、 ANSI/ESD STM5.2-2012 Revision and Redesignation of ANSI/ESD S5.2-2009 For Electrostatic Discharge Sensitivity Testing Machine Model (MM) Component Level Electrostatic Discharge Association 7900 Turin Road, Bldg. 3 Rome, NY 13440 An American National Standard Approved July 29, 2013 ANSI/ESD STM5.2-2

2、012 ESD Association Standard Test Method for Electrostatic Discharge Sensitivity Testing Machine Model (MM) Component Level Approved February 3, 2012 ESD Association ANSI/ESD STM5.2-2012 Electrostatic Discharge Association (ESDA) standards and publications are designed to serve the public interest b

3、y eliminating misunderstandings between manufacturers and purchasers, facilitating the interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining the proper product for his particular needs. The existence of such standards and publications shall not in any

4、 respect preclude any member or non-member of the Association from manufacturing or selling products not conforming to such standards and publications. Nor shall the fact that a standard or publication that is published by the Association preclude its voluntary use by non-members of the Association,

5、 whether the document is to be used either domestically or internationally. Recommended standards and publications are adopted by the ESDA in accordance with the ANSI Patent policy. Interpretation of ESDA Standards: The interpretation of standards in-so-far as it may relate to a specific product or

6、manufacturer is a proper matter for the individual company concerned and cannot be undertaken by any person acting for the ESDA. The ESDA Standards Chairman may make comments limited to an explanation or clarification of the technical language or provisions in a standard, but not related to its appl

7、ication to specific products and manufacturers. No other person is authorized to comment on behalf of the ESDA on any ESDA Standard. THE CONTENTS OF ESDAS STANDARDS AND PUBLICATIONS ARE PROVIDED “AS-IS,” AND ESDA MAKES NO REPRESENTATIONS OR WARRANTIES, EXPRESSED OR IMPLIED, OF ANY KIND, WITH RESPECT

8、 TO SUCH CONTENTS. ESDA DISCLAIMS ALL REPRESENTATIONS AND WARRANTIES, INCLUDING WITHOUT LIMITATION, WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR USE, TITLE, AND NON-INFRINGEMENT. ESDA STANDARDS AND PUBLICATIONS ARE CONSIDERED TECHNICALLY SOUND AT THE TIME THEY ARE APPROVED FOR

9、PUBLICATION. THEY ARE NOT A SUBSTITUTE FOR A PRODUCT SELLERS OR USERS OWN JUDGEMENT WITH RESPECT TO ANY PARTICULAR PRODUCT DISCUSSED, AND ESDA DOES NOT UNDERTAKE TO GUARANTEE THE PERFORMANCE OF ANY INDIVIDUAL MANUFACTURERS PRODUCTS BY VIRTUE OF SUCH STANDARDS OR PUBLICATIONS. THUS, ESDA EXPRESSLY DI

10、SLAIMS ANY RESPONSIBILITY FOR DAMAGES ARISING FROM THE USE, APPLICATION, OR RELIANCE BY OTHERS ON THE INFORMATION CONTAINED IN THESE STANDARDS OR PUBLICATIONS. NEITHER ESDA, NOR ITS MEMBERS, OFFICERS, EMPLOYEES OR OTHER REPRESENTATIVES WILL BE LIABLE FOR DAMAGES ARISING OUT OF, OR IN CONNECTION WITH

11、, THE USE OR MISUSE OF ESDA STANDARDS OR PUBLICATIONS, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. THIS IS A COMPREHENSIVE LIMITATION OF LIABILITY THAT APPLIES TO ALL DAMAGES OF ANY KIND, INCLUDING, WITHOUT LIMITATION, LOSS OF DATA, INCOME OR PROFIT, LOSS OF OR DAMAGE TO PROPERTY, AND CLAIMS OF THIR

12、D PARTIES. Published by: Electrostatic Discharge Association 7900 Turin Road, Bldg. 3 Rome, NY 13440 Copyright 2013 by ESD Association All rights reserved No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission o

13、f the publisher. Printed in the United States of America ISBN: 1-58537-239-0 CAUTION NOTICE DISCLAIMER OF WARRANTIES DISCLAIMER OF GUARANTY LIMITATION ON ESDAs LIABILITY ANSI/ESD STM5.2-2012 i (This foreword is not part of ESD Association Standard Test Method ANSI/ESD STM5.2-2012) FOREWORD This docu

14、ment defines a standard test method that simulates an electrostatic discharge (ESD) event occurring from a low resistance source. Component damage caused by the Machine Model (MM) is often similar to that caused by the Human Body Model (HBM), but occurs at a significantly lower voltage. Other forms

15、of ESD-related component damage, such as that induced by the Charged Device Model (CDM), may result in a different failure signature for some components. To fully characterize a components electrostatic discharge susceptibility, it should be tested to the following two ESD test standards: Human Body

16、 Model Charged Device Model Requirements for HBM and CDM testing are contained in the ESD Association Standards ANSI/ESDA/JEDEC JS-001 and ANSI/ESD S5.3.1, respectively. Users of this MM standard test method1document should understand that the data obtained when stress testing the components does no

17、t necessarily mean that the components will be unaffected if subjected to a lower level actual ESD. This MM standard test method document is intended to minimize test data correlation problems due to variations between testers. It should be noted that contact of devices to charged metal can occur, a

18、nd is a threat if proper precautions are not taken. This model can be useful for producing Human-Body Model (HBM)-like ESD effects at lower voltages and for failure mode determination. The method produces results which are closely related to HBM and produces similar failure modes. This document was

19、originally designated ESD S5.2-1994 and approved on June 22, 1994. ANSI/ESD STM5.2-1999 was a revision, re-designation of ESD S5.2-1994, and was approved on May 16, 1999. ANSI/ESD S5.2-2009 was a revision, re-designation of ANSI/ESD STM5.2-1999, and was approved on September 16, 2009. ANSI/ESD STM5.

20、2-2012 is a revision, re-designation of ANSI/ESD S5.2-2009, and was approved on February 3, 2012. 1ESD Association Standard Test Method (STM): A definitive procedure for the identification, measurement and evaluation of one or more qualities, characteristics, or properties of a material, product, sy

21、stem, or process that yield a reproducible test results. ANSI/ESD STM5.2-2012 ii At the time ANSI/ESD STM5.2-2012 was prepared, the 5.2 Device Testing (MM) Subcommittee had the following members: Leo G. Henry, Chair ESD Ph: 315-339-6937; FAX: 315-339-6793; www.esda.org ANSI/ESD STM5.2-2012 2 5.0 REQ

22、UIRED EQUIPMENT 5.1 MM ESD Tester An acceptable tester is composed of equipment meeting the requirements of this standard (schematically represented in Figure 1 and producing pulses meeting the waveform characteristics represented in Figures 2 and 3 and specified in Tables 2 and 3). 5.2 Waveform Ver

23、ification Equipment Equipment capable of verifying the pulse waveforms defined in this standard includes, but is not limited to, an oscilloscope, two evaluation loads, and a current transducer. 5.2.1 Oscilloscope Oscilloscope requirements: a. Minimum sensitivity of 100 milliamperes per major divisio

24、n (typically 1 cm 0.4 inches) when used in conjunction with the current transducer specified in Section 5.2.3. b. Minimum single shot bandwidth of 350 megahertz. c. Minimum writing rate of one major division per nanosecond. 5.2.2 Evaluation Loads Two evaluation loads are necessary to verify tester f

25、unctionality: Load a: A solid 18 to 24 American Wire Gauge (AWG) (0.81 to 0.21 mm2cross section) tinned copper shorting wire, not longer than 75 mm (3 inches) in length. Load b: A 500 ohm 1%, 1000 volt, low inductance resistor (Caddock Industries type MG 714 or equivalent). The lead length of both e

26、valuation loads should be as short as possible. The wire should span the distance from the reference pin to any other pin on the test socket while passing through the current transducer. 5.2.3 Current Transducer Current transducer requirements: a. Minimum bandwidth of 200 megahertz. b. Peak pulse ca

27、pability of 12 amperes. c. Rise time of less than one nanosecond. d. Capable of accepting at least a solid 24 AWG wire. e. Provide an output voltage per milliampere as required in Section 5.2.1.a (usually 1 to 5 millivolt per milliampere). A Tektronix CT-2 or equivalent with a maximum cable length o

28、f one meter meets these requirements. 6.0 EQUIPMENT, WAVEFORM, AND QUALIFICATION REQUIREMENTS 6.1 Equipment Calibration Periodically calibrate all equipment used to evaluate the tester in accordance with the manufacturers recommendation. This includes the oscilloscope, current transducer, and high v

29、oltage resistor load. Maximum time between calibrations shall be one year. Calibration shall be traceable to national standards, such as the National Institute of Standards and Technology (NIST) in the United States, or to international standards. ANSI/ESD STM5.2-2012 3 6.2 Tester Qualification and

30、Re-Qualification Perform tester qualification procedures as part of the acceptance testing when the ESD tester is delivered. Refer to the manufacturers recommendations for acceptance testing procedures. Perform requalification (in accordance with Section 7.2) following repairs or servicing that coul

31、d affect the waveform. The maximum time between full requalification tests shall be one year. Retain all waveform records for the life of the tester, or for the duration specified by internal record keeping procedures. 6.3 Test Fixture Board Qualification Perform the test fixture board qualification

32、 procedure in accordance with Section 7.3 on all new test fixture boards and any existing boards not previously checked. The waveform check is required for positive clamp (zero insertion force) sockets each time the test fixture board is changed. The waveform check is recommended for all other socke

33、t types. Refer to Section 7.1 for waveform capture procedures. 6.4 Daily Tester Functionality Check Verify the ESD tester functionality at least once per shift (Section 7.4). Longer periods between tester checks may be used if no changes in waveforms are observed for several consecutive checks. Howe

34、ver, if the waveforms no longer meet the specified limits, all ESD stress tests subsequent to the previous satisfactory waveform check shall be considered invalid. NOTE: If ESD stress testing is performed on consecutive shifts, tester checks at the end of one shift may also serve as the initial chec

35、k for the following shift. 7.0 QUALIFICATION AND VERIFICATION PROCEDURES 7.1 Waveform Capture Procedure Use the following procedure to verify the waveforms: NOTE: This procedure applies to both single pulse and multiple pulse generation circuits. 7.1.1 The reference pin pair is defined as the pin pa

36、ir with the shortest and the longest path to the pulse generation circuit. If the tester has more than one pulse generation circuit, a reference pin pair is defined for each pulse generating circuit. This information is typically supplied by the test fixture board designer or manufacturer. Alternati

37、vely, the reference pin pair(s) previously identified during HBM testing may be used. Refer to ANSI/ESDA/JEDEC JS-001. 7.1.2 To capture a waveform using a shorting wire, connect the pin with the shortest wiring path to Terminal B, the ground connection. Place the shorting wire through the current tr

38、ansducer, as close to Terminal B as practical, observing the polarity shown in Figure 1. Connect the other end of the wire to the pin to be tested. This pin is referred to as Terminal A. If the tester has more than one pulse generation circuit, every pulse generating circuit is to be tested individu

39、ally as a Terminal A connection. NOTE: For non-positive clamp sockets, attach the shorting wire to the wiring of the test fixture board between the socket pins connected to Terminals A and B. The connection points shall be as close as possible to the test socket pins. 7.1.3 To capture a waveform usi

40、ng the 500 ohm resistor, replace the shorting wire with the resistor. Refer to Figure 1 to determine placement of the resistor in relation to the current transducer. ANSI/ESD STM5.2-2012 4 7.2 Tester Qualification and Re-Qualification Procedure Use the following procedure for qualification and re-qu

41、alification of the tester: 7.2.1 Test the high voltage discharge path and all associated circuitry (sometimes referred to as Self Test and VI Test) according to the equipment manufacturers procedures. If more than one pulse generation circuit is used, all high voltage discharge paths are to be teste

42、d. 7.2.2 If the equipment has test point capture location(s), capture a waveform from the high voltage pulse generators at each location. Refer to the tester manufacturers manual for procedures. 7.2.3 Using the shorting wire and an applied voltage of 100, 200 and 400 volts, record positive and negat

43、ive waveforms on each reference pin pair and any other pins recommended by the equipment manufacturer. Verify the waveforms meet the specifications in Figure 2 and Table 2. 7.2.4 To test for spurious pulses; set the horizontal time scale of the oscilloscope to 1 ms per division. Using the shorting w

44、ire, initiate a pulse, and verify that any spurious pulse is less than 15% of the amplitude of the main pulse. 7.2.5 Using the 500 ohm resistor and an applied voltage of 400 volts, record waveforms for each reference pin pair. Verify the waveforms meet the specifications in Figure 3 and Table 3. 7.3

45、 Test Fixture Board Qualification Procedure Use the following procedure for qualification of test fixture boards: 7.3.1 Verify electrical continuity for all pins on the test fixture board. 7.3.2 Capture a waveform for each reference pin pair and any other pin combinations recommended by the manufact

46、urer of each socket on the board using the shorting wire and a 400 volt pulse. Verify the waveforms meet the specifications in Figure 2 and Table 2. 7.3.3 Capture a waveform on each reference pin pair using the 500 ohm resistor. Use an applied voltage of 400 volts. Verify the waveforms meet the spec

47、ifications in Figure 3 and Table 3. 7.4 Daily Tester Functionality Check Procedure Use the following procedure to verify tester functionality: 7.4.1 Test the high voltage discharge path and all associated circuitry at the beginning of each day during which ESD stress testing is performed. Use the te

48、ster manufacturers recommended procedure. If any failure is detected, do not perform testing with the sockets that use the defective discharge paths. Repair the tester and then re-qualify it in accordance with Section 7.2. 7.4.2 Verify the waveform integrity at least once per shift. If necessary, re

49、move the test fixture board being used, and replace with a positive clamp socket test fixture board to facilitate waveform measurements. Verify the waveform using the shorting wire at 400 volts, or the stress level to be tested. If the tester has more than one pulse generation circuit, then the waveform from every pulse generation circuit is to be verified. ANSI/ESD STM5.2-2012 5 8.0 MM STRESS LEVELS Perform ESD stress testing at room temperature in accordance with the procedure below. Suggested stress levels are 25 volts, 50 volts, 100 volts, 200 volts, an